[M] Change in coreboot[main]: soc/intel/xeon_sp: Further share domain creation logics in Xeon-SP

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81098?usp=email )

Change subject: soc/intel/xeon_sp: Further share domain creation logics in Xeon-SP
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Patch Set 3:

(2 comments)

File src/soc/intel/xeon_sp/chip_common.c:

https://review.coreboot.org/c/coreboot/+/81098/comment/8f0542e5_277d5a8d :
PS2, Line 170: northbridge_write_acpi_tables
> Can this be merged into iio_pcie_domain_ops? You could check in northbridge_write_acpi_tables() if t […]

Good suggestion!

https://review.coreboot.org/c/coreboot/+/81098/comment/d065c65a_08887005 :
PS2, Line 287: downstream
> dev->path.domain. […]

Acknowledged