Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu.
agogo has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85888?usp=email )
Change subject: soc/mediatek/mt8196: Initialize MCUPM ......................................................................
Patch Set 2:
(7 comments)
File src/soc/mediatek/mt8196/mcupm.c:
https://review.coreboot.org/c/coreboot/+/85888/comment/51293c4a_eb35bdce?usp... : PS1, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */
SPDX-License-Identifier: GPL-2. […]
Done
https://review.coreboot.org/c/coreboot/+/85888/comment/fac07110_6acddc0c?usp... : PS1, Line 9: #include <stdlib.h>
what is this for ?
For the below errors. error: implicit declaration of function 'printk' [-Werror=implicit-function-declaration] error: 'BIOS_WARNING' undeclared (first use in this function)
https://review.coreboot.org/c/coreboot/+/85888/comment/3abb5f98_5b99eea4?usp... : PS1, Line 34: set
Set
Done
https://review.coreboot.org/c/coreboot/+/85888/comment/04227623_bd77ff9d?usp... : PS1, Line 42: polling
Poll
Done
https://review.coreboot.org/c/coreboot/+/85888/comment/3b63260f_69138e7e?usp... : PS1, Line 39: /* set CPUEB_STATE_VALID = 1 */ : setbits32p(SPM_MCUPM_SPMC_CON, CPUEB_STATE_VALID); : : /* polling CPUEB_STATE_FINISH_ACK = 1 */ : if (!retry(POLLING_ACK_TIME, : (read32p(SPM_MCUPM_SPMC_CON) & CPUEB_STATE_FINISH_ACK) == : CPUEB_STATE_FINISH_ACK, udelay(1))) { : printk(BIOS_WARNING, : "[EB_SPMC] Polling ACK timeout, %#x\n", : read32p(SPM_MCUPM_SPMC_CON)); : return -1; : } : : /* set CPUEB_STATE_VALID = 0 */ : clrbits32p(SPM_MCUPM_SPMC_CON, CPUEB_STATE_VALID); : : /* polling CPUEB_STATE_FINISH_ACK = 0 */ : if (!retry(POLLING_ACK_TIME, : (read32p(SPM_MCUPM_SPMC_CON) & CPUEB_STATE_FINISH_ACK) != : CPUEB_STATE_FINISH_ACK, udelay(1))) { : printk(BIOS_WARNING, : "[EB_SPMC] Polling ACK timeout, %#x\n", : read32p(SPM_MCUPM_SPMC_CON)); : return -1; : }
Create a function to set value to `SPM_MCUPM_SPMC_CON` […]
This modification is not necessary
https://review.coreboot.org/c/coreboot/+/85888/comment/cdfcb836_474a364c?usp... : PS1, Line 73: CPUEB_SPMC_STATUS_MASK;
align with `(read32p`
Done
https://review.coreboot.org/c/coreboot/+/85888/comment/7015cdab_09dc3cc1?usp... : PS1, Line 101: MCUPM_CFGREG_SW_RSTN_SW_RSTN | MCUPM_CFGREG_SW_RSTN_DMA_BUSY_MASK);
move to next line and align with first param.
Done