Change in coreboot[master]: mb/google/zork/berknip: Increase eMMC initial clock frequency
Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45931 )
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/berknip: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Berknip w/ eMMC to OS.
Change-Id: I5d55f55b8208b4dc3fbdc9d1ec6333f9e211e3fd Signed-off-by: Rob Barnes robbarnes@google.com --- M src/mainboard/google/zork/variants/berknip/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/45931/1
diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 9562939..674d557 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -38,6 +38,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45931
to look at the new patch set (#2).
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/berknip: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Berknip w/ eMMC to OS. BRANCH=zork
Change-Id: I5d55f55b8208b4dc3fbdc9d1ec6333f9e211e3fd Signed-off-by: Rob Barnes robbarnes@google.com --- M src/mainboard/google/zork/variants/berknip/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/45931/2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45931 )
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG@14 PS2, Line 14: Berknip Did you have the latest depthcharge patches?
Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45931 )
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
Patch Set 2: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG@14 PS2, Line 14: Berknip
Did you have the latest depthcharge patches?
Not sure, I'll verify and retest.
Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45931 )
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
Patch Set 2: -Code-Review
(1 comment)
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45931/2//COMMIT_MSG@14 PS2, Line 14: Berknip
Not sure, I'll verify and retest.
Retested with and this is what I see in the depthcharge log:
eMMC: Tuning complete after 155 us, 12 blocks Switched to HS200 emmc_set_ios: Disabling Tuning emmc_set_ios: Re-Enabling Tuning Switched to HS400
So this change is verified with latest depthcharge patches.
Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45931 )
Change subject: mb/google/zork/berknip: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/berknip: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Berknip w/ eMMC to OS. BRANCH=zork
Change-Id: I5d55f55b8208b4dc3fbdc9d1ec6333f9e211e3fd Signed-off-by: Rob Barnes robbarnes@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45931 Reviewed-by: Raul Rangel rrangel@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/berknip/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 9562939..674d557 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -38,6 +38,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
-
Paul Fagerburg (Code Review) -
Raul Rangel (Code Review)
-
Rob Barnes (Code Review)