Change in coreboot[master]: mb/google/zork: Correct PIRQ_MISC0 configuration

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63796 )

Change subject: mb/google/zork: Correct PIRQ_MISC0 configuration
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mb/google/zork: Correct PIRQ_MISC0 configuration

The current configuration is masking off IRQ 1 and IRQ 12 to the PIC.
This for some reason causes problems when using level triggered
interrupts. This change updates the PIRQ_MISC0 value to match what
skyrim is doing. This will enable level interrupts to work correctly.

BUG=b:218874489, b:160595155
TEST=Boot zork and verify keyboard still works. Boot with patch train
and verify keyboard works as expected.

Signed-off-by: Raul E Rangel 
Change-Id: I46b1fd68915c6f7aa4c34cdba57d24425752bc38
---
M src/mainboard/google/zork/mainboard.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/63796/1

diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c
index 54da830..05e948e 100644
--- a/src/mainboard/google/zork/mainboard.c
+++ b/src/mainboard/google/zork/mainboard.c
@@ -80,7 +80,7 @@

/* The MISC registers are not interrupt numbers */
    { PIRQ_MISC,	0xfa,		0x00 },
-	{ PIRQ_MISC0,	0xf1,		0x00 },
+	{ PIRQ_MISC0,	0x91,		0x00 },
    { PIRQ_MISC1,	0x00,		0x00 },
    { PIRQ_MISC2,	0x00,		0x00 },
 };