[M] Change in coreboot[main]: cpu/x86/64bit: Install extended page tables in BSS

[Patrick Rudolph (Code Review)]

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Shuo Liu, Tim Chu.

Hello Christian Walter, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Shuo Liu, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85806?usp=email

to look at the new patch set (#5).

Change subject: cpu/x86/64bit: Install extended page tables in BSS
......................................................................

cpu/x86/64bit: Install extended page tables in BSS

On Intel 14nm Xeon-SP every processor supports 1TiB of DRAM. Since
MMIO is mapped above usable DRAM, the default page tables in RODATA
are not sufficient to cover the high MMIO space.

This prevents the use of coreboot's ramstage drivers as they cannot
access the PCI BARs residing in high MMIO.

Introduce a simple page table generator that installs extended page
tables in BSS to access up to 48bit of the virtual address space.

TEST: QEMU (that does not support 1GB PT) is able to access up to
      512 GiB of memory after installing PT in BSS.
      IBM/SBP1 (that does support 1GB PT) is able to boot to OS
      with new page tables installed.

Change-Id: Ifab50975e0382a1f5c27b55bca1dbbb66b37ba3a
Signed-off-by: Patrick Rudolph 
---
M src/cpu/x86/64bit/Makefile.mk
A src/cpu/x86/64bit/mmu.c
M src/cpu/x86/Kconfig
M src/soc/intel/xeon_sp/Kconfig
4 files changed, 215 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/85806/5