Change in coreboot[master]: soc/intel/cannonlake: Enable low power S0 Idle capability

[Vaibhav Shankar (Code Review)]

Vaibhav Shankar has uploaded this change for review. ( https://review.coreboot.org/25292

Change subject: soc/intel/cannonlake: Enable low power S0 Idle capability
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soc/intel/cannonlake: Enable low power S0 Idle capability

This patch sets the ACPI FADT flag ACPI_FADT_LOW_POWER_S0
if S0ix is enabled for the platform.

TEST= Boot to OS and check the ACPI_FADT_LOW_PWR_IDLE_S0 flag
      is set in FACP table - FADT.Flags[21] bit.

Change-Id: I6214ebb61f25ef8b704e60c8474808493c92e6f6
Signed-off-by: Vaibhav Shankar 
---
M src/soc/intel/cannonlake/acpi.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/25292/1

diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 9dcaa33..0134b86 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -187,6 +187,9 @@
    fadt->x_pm_tmr_blk.resv = 0;
    fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR;
    fadt->x_pm_tmr_blk.addrh = 0x0;
+
+	if(config->s0ix_enable)
+		fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;
 }
 uint32_t soc_read_sci_irq_select(void)
 {