Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
amd/common/acpi: move thermal zone to common location
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: I048d1906bc474be4d5a4e44b9c7ae28f53b49d5a --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl A src/soc/amd/common/acpi/thermal_zone.asl 6 files changed, 89 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/39779/1
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index 72efeca..6f51ea1 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -124,7 +124,6 @@ /* Northbridge function 3 */ Device(NBF3) { Name(_ADR, 0x00180003) - /* k10temp thermal zone */ - #include "thermal_mixin.asl" + #include <soc/amd/common/acpi/thermal_zone.asl> } /* end NBF3 */ diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl index 40df891..217132f 100644 --- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl index 34bf33a..34e8ef0 100644 --- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl index cdb4063..ed5db82 100644 --- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl @@ -65,5 +65,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl index 34bf33a..34e8ef0 100644 --- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/soc/amd/common/acpi/thermal_zone.asl b/src/soc/amd/common/acpi/thermal_zone.asl new file mode 100644 index 0000000..75f1611 --- /dev/null +++ b/src/soc/amd/common/acpi/thermal_zone.asl @@ -0,0 +1,84 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * Include this file into a mainboard DSDT inside the PCI device + * "Northbridge Miscellaneous Control (Northbridge function 3)" and it + * will expose the temperature sensor of the processor as a thermal + * zone. + * + * Families 10 through 14 and some family 15 CPUs are supported. + * + * If, for example, the NB Misc. Control device is on 0:18.3, include + * the following: + * + * Scope (_SB.PCI0) { + * Device (K10M) { + * Name (_ADR, 0x00180003) + * #include <soc/amd/common/acpi/thermal_zone.asl> + * } + * } + * + * Do not include this if the board is affected by erratum 319 as the + * thermal sensor of Socket F/AM2+ processors may be unreliable. + * (Erratum 319 affects AM2+ boards, AM3 and later should be fine) + */ + +#ifndef K10TEMP_HOT_OFFSET +# define K10TEMP_HOT_OFFSET 100 +#endif + +#define K10TEMP_KELVIN_OFFSET 2732 +#define K10TEMP_TLIMIT_OFFSET 520 + +OperationRegion (TCFG, PCI_Config, 0x64, 0x4) +Field (TCFG, ByteAcc, NoLock, Preserve) { + HTCE, 1, /* Hardware thermal control enable */ + , 15, + TLMT, 7, /* (LimitTmp - 52) / 0.5 */ + , 9, +} + +OperationRegion (TCTL, PCI_Config, 0xa4, 0x4) +Field (TCTL, ByteAcc, NoLock, Preserve) { + , 21, + TNOW, 11, /* CurTmp / 0.125 */ +} + +ThermalZone (TZ00) { + Name (_STR, Unicode ("AMD CPU Core Thermal Sensor")) + + Method (_STA) { + If (LEqual (HTCE, One)) { + Return (0x0F) + } + Return (Zero) + } + + Method (_TMP) { /* Current temp in tenths degree Kelvin. */ + Multiply (TNOW, 10, Local0) + ShiftRight (Local0, 3, Local0) + Return (Add (Local0, K10TEMP_KELVIN_OFFSET)) + } + + Method (_CRT) { /* Critical temp in tenths degree Kelvin. */ + Multiply (TLMT, 10, Local0) + ShiftRight (Local0, 1, Local0) + Add (Local0, K10TEMP_TLIMIT_OFFSET, Local0) + Return (Add (Local0, K10TEMP_KELVIN_OFFSET)) + } + + Method (_HOT) { /* Hot temp in tenths degree Kelvin. */ + Return (Subtract (_CRT, K10TEMP_HOT_OFFSET)) + } +}
Hello Nico Huber, Paul Menzel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39779
to look at the new patch set (#2).
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
amd/common/acpi: move thermal zone to common location
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: I048d1906bc474be4d5a4e44b9c7ae28f53b49d5a --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl R src/soc/amd/common/acpi/thermal_zone.asl 6 files changed, 9 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/39779/2
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 3:
This change is ready for review.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 3: Code-Review+1
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 3: Code-Review+2
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 3: Code-Review+1
Took me two minutes to understand that the soc/amd/common/acpi/thermal_zone.asl does not include itself - it's just an example as a comment -.-.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 3: Code-Review+2
Patch Set 3: Code-Review+1
Took me two minutes to understand that the soc/amd/common/acpi/thermal_zone.asl does not include itself - it's just an example as a comment -.-.
😄
Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
amd/common/acpi: move thermal zone to common location
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: I048d1906bc474be4d5a4e44b9c7ae28f53b49d5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/39779 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Christian Walter christian.walter@9elements.com Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl R src/soc/amd/common/acpi/thermal_zone.asl 6 files changed, 6 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved Christian Walter: Looks good to me, but someone else must approve
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index 72efeca..6f51ea1 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -124,7 +124,6 @@ /* Northbridge function 3 */ Device(NBF3) { Name(_ADR, 0x00180003) - /* k10temp thermal zone */ - #include "thermal_mixin.asl" + #include <soc/amd/common/acpi/thermal_zone.asl> } /* end NBF3 */ diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl index 40df891..217132f 100644 --- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl index 34bf33a..34e8ef0 100644 --- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl index cdb4063..ed5db82 100644 --- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl @@ -65,5 +65,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl index 34bf33a..34e8ef0 100644 --- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl @@ -95,5 +95,5 @@
Device(K10M) { Name (_ADR, 0x00180003) - #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + #include <soc/amd/common/acpi/thermal_zone.asl> } diff --git a/src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl b/src/soc/amd/common/acpi/thermal_zone.asl similarity index 96% rename from src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl rename to src/soc/amd/common/acpi/thermal_zone.asl index 3c692ce..e6ab432 100644 --- a/src/northbridge/amd/agesa/family14/acpi/thermal_mixin.asl +++ b/src/soc/amd/common/acpi/thermal_zone.asl @@ -25,7 +25,7 @@ * Scope (_SB.PCI0) { * Device (K10M) { * Name (_ADR, 0x00180003) - * #include <northbridge/amd/agesa/family14/acpi/thermal_mixin.asl> + * #include <soc/amd/common/acpi/thermal_zone.asl> * } * } *
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39779 )
Change subject: amd/common/acpi: move thermal zone to common location ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 5/0/5 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1718 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1717 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1716 Non-emulation targets: HP_COMPAQ_8200_ELITE_SFF_PC using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1720 HP_COMPAQ_8200_ELITE_SFF_PC using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1719
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
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Christian Walter (Code Review)
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Michał Żygowski (Code Review)
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Nico Huber (Code Review)
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Paul Menzel (Code Review)