Change in ...coreboot[master]: nb/intel/sandybridge: Use system_reset()

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32493

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

nb/intel/sandybridge: Use system_reset()

Use already defined system_reset() function.

Change-Id: Ic4716a3bb1dc6c6b29a028fc0ab28f9195f08416
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/sandybridge/raminit.c
1 file changed, 4 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/32493/1

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 050f4c2..efd56a5 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -312,9 +312,7 @@
        && reg_5d10 && !s3resume) {
    	MCHBAR32(0x5d10) = 0;
    	/* Need reset.  */
-		outb(0x6, 0xcf9);
-
-		halt();
+		system_reset();
    }

early_pch_init_native();
@@ -326,8 +324,7 @@
    if (cache_not_found || (region_device_sz(&rdev) < sizeof(ctrl))) {
    	if (s3resume) {
    		/* Failed S3 resume, reset to come up cleanly */
-			outb(0x6, 0xcf9);
-			halt();
+			system_reset();
    	}
    	ctrl_cached = NULL;
    } else {
@@ -356,8 +353,7 @@
    	if (err) {
    		if (s3resume) {
    			/* Failed S3 resume, reset to come up cleanly */
-				outb(0x6, 0xcf9);
-				halt();
+				system_reset();
    		}
    		/* no need to erase bad mrc cache here, it gets overwritten on
    		 * successful boot. */
@@ -430,8 +426,7 @@
    	save_timings(&ctrl);
    if (s3resume && !cbmem_was_inited) {
    	/* Failed S3 resume, reset to come up cleanly */
-		outb(0x6, 0xcf9);
-		halt();
+		system_reset();
    }

if (!s3resume)

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32493

to look at the new patch set (#2).

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

nb/intel/sandybridge: Use system_reset()

Use already defined system_reset() function.

Change-Id: Ic4716a3bb1dc6c6b29a028fc0ab28f9195f08416
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/sandybridge/raminit.c
1 file changed, 5 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/32493/2

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32493

to look at the new patch set (#3).

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

nb/intel/sandybridge: Use system_reset()

Use already defined system_reset() function.

Change-Id: Ic4716a3bb1dc6c6b29a028fc0ab28f9195f08416
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
2 files changed, 8 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/32493/3

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32493 )

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

Patch Set 3: Code-Review+2

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32493 )

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

Patch Set 3: Code-Review+1

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32493 )

Change subject: nb/intel/sandybridge: Use system_reset()
......................................................................

nb/intel/sandybridge: Use system_reset()

Use already defined system_reset() function.

Change-Id: Ic4716a3bb1dc6c6b29a028fc0ab28f9195f08416
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32493
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Rudolph 
Reviewed-by: Paul Menzel 
---
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
2 files changed, 8 insertions(+), 13 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Patrick Rudolph: Looks good to me, approved

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 050f4c2..cea3f2c 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -18,6 +18,7 @@
 #include <console/console.h>
 #include <commonlib/region.h>
 #include <bootmode.h>
+#include <cf9_reset.h>
 #include <string.h>
 #include <arch/cpu.h>
 #include <arch/io.h>
@@ -312,9 +313,7 @@
        && reg_5d10 && !s3resume) {
    	MCHBAR32(0x5d10) = 0;
    	/* Need reset.  */
-		outb(0x6, 0xcf9);
-
-		halt();
+		system_reset();
    }

early_pch_init_native();
@@ -326,8 +325,7 @@
    if (cache_not_found || (region_device_sz(&rdev) < sizeof(ctrl))) {
    	if (s3resume) {
    		/* Failed S3 resume, reset to come up cleanly */
-			outb(0x6, 0xcf9);
-			halt();
+			system_reset();
    	}
    	ctrl_cached = NULL;
    } else {
@@ -356,8 +354,7 @@
    	if (err) {
    		if (s3resume) {
    			/* Failed S3 resume, reset to come up cleanly */
-				outb(0x6, 0xcf9);
-				halt();
+				system_reset();
    		}
    		/* no need to erase bad mrc cache here, it gets overwritten on
    		 * successful boot. */
@@ -430,8 +427,7 @@
    	save_timings(&ctrl);
    if (s3resume && !cbmem_was_inited) {
    	/* Failed S3 resume, reset to come up cleanly */
-		outb(0x6, 0xcf9);
-		halt();
+		system_reset();
    }

if (!s3resume)
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 8c4f27d..a68ae49 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -16,6 +16,7 @@
 #include <console/console.h>
 #include <console/usb.h>
 #include <bootmode.h>
+#include <cf9_reset.h>
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_ops.h>
@@ -212,8 +213,7 @@
    /* If MRC data is not found we cannot continue S3 resume. */
    if (pei_data->boot_mode == 2 && !pei_data->mrc_input) {
    	printk(BIOS_DEBUG, "Giving up in sdram_initialize: No MRC data\n");
-		outb(0x6, 0xcf9);
-		halt();
+		system_reset();
    }

/* Pass console handler in pei_data */
@@ -310,7 +310,6 @@

if (s3resume && !cbmem_was_initted) {
    	/* Failed S3 resume, reset to come up cleanly */
-		outb(0x6, 0xcf9);
-		halt();
+		system_reset();
    }
 }