[S] Change in coreboot[main]: sb/intel/bd82x6x: Disable unused PCIe root ports

[Patrick Rudolph (Code Review)]

Attention is currently required from: Patrick Rudolph.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78226?usp=email

to look at the new patch set (#2).

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Verified+1 by build bot (Jenkins)

Change subject: sb/intel/bd82x6x: Disable unused PCIe root ports
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sb/intel/bd82x6x: Disable unused PCIe root ports

Follow the PCH BIOS spec more closely by porting the broadwell
and braswell PCIe downstream device detection.

- Set "Slot Implemented" bit.
- Read SLSTS BIT22 to detect connected downstream devices as done on
  braswell.
- Disable unused PCIe slots that are not hotplugable.
- Set BIT26 in register 0x338 and wait for bits in register 0x328
  to clear as done on broadwell.

Test: Tested on Lenovo X220. Unused root ports are disabled and port
      that are in used or marked hot-plug are kept enabled.

TODO: Test on more devices and measure powersavings.

Change-Id: I8ccfcab2e0e4faba8322755a4f8c2108d9b007ac
Signed-off-by: Patrick Rudolph 
---
M src/southbridge/intel/bd82x6x/pch.c
1 file changed, 37 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/78226/2