Change in coreboot[master]: soc/intel/common: Check if CSE is function disable

[Subrata Banik (Code Review)]

Attention is currently required from: Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Patrick Rudolph, EricR Lai.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58513 )

Change subject: soc/intel/common: Check if CSE is function disable
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Patch Set 5:

(1 comment)

File src/soc/intel/common/block/cse/cse_eop.c:

https://review.coreboot.org/c/coreboot/+/58513/comment/e3ef199f_37498494 
PS5, Line 182: 	if (!is_cse_enabled())
> Is this the only situation? Any other HECI command need check this?

@Eric, looking at the scope of FSP putting the CSE into FD, EOP is the only command that comes after that. Hence, for now to fix this regression, we could go with this.

But I might need to find a way to reactor the common code in general to nullify the assumption that all PCI devices are available on the PCI bus by default.