Attention is currently required from: Bora Guvendik, Maulik V Vaghela, Selma Bensaid.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52865 )
Change subject: mb/intel/adlrvp_m: Program CPU PCIE RP GPIOs in early GPIO
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52865/comment/06cb003c_a2bad7c0
PS1, Line 9: We need to configure CPU PCIE root port related gpios in early
: boot block stage for CPU root ports to work.
Hi Furquan, […]
Thanks Maulik. Can you please add that detail to the commit message? It wasn't clear that there is a dependency on FSP-M PCIe configuration.
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