Change in coreboot[master]: cpu/amd/fam10: Reduce headers included in init_cpus.h

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20976

Change subject: cpu/amd/fam10: Reduce headers included in init_cpus.h
......................................................................

cpu/amd/fam10: Reduce headers included in init_cpus.h

Change-Id: Id91caa7c55367e794802788d9007920817f2d484
Signed-off-by: Arthur Heymans 
---
M src/cpu/amd/family_10h-family_15h/defaults.h
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/include/cpu/amd/multicore.h
M src/northbridge/amd/amdmct/amddefs.h
6 files changed, 13 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/20976/1

diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h
index 88950a3..f270510 100644
--- a/src/cpu/amd/family_10h-family_15h/defaults.h
+++ b/src/cpu/amd/family_10h-family_15h/defaults.h
@@ -16,6 +16,7 @@

#include <northbridge/amd/amdmct/amddefs.h>
 #include <cpu/amd/mtrr.h>
+#include <cpu/amd/msr.h>

/*
  * Default MSR and errata settings.
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c
index af3a674..81baf5d 100644
--- a/src/cpu/amd/family_10h-family_15h/fidvid.c
+++ b/src/cpu/amd/family_10h-family_15h/fidvid.c
@@ -97,6 +97,7 @@
 #include <northbridge/amd/amdht/AsPsDefs.h>
 #include <northbridge/amd/amdht/ht_wrapper.h>
 #include <cpu/amd/multicore.h>
+#include <cpu/x86/lapic.h>

#include "init_cpus.h"

diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index be4f8d4..3f1e288 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -26,6 +26,11 @@
 #include <northbridge/amd/amdht/porting.h>
 #include <northbridge/amd/amdht/h3ncmn.h>

+#include <cpu/x86/lapic.h>
+#include <cpu/amd/multicore.h>
+#include <cpu/amd/msr.h>
+#include <reset.h>
+
 #if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_SB700)
 #include <southbridge/amd/sb700/sb700.h>
 #endif
@@ -35,6 +40,7 @@
 #endif

#include "cpu/amd/car/post_cache_as_ram.c"
+#include "defaults.h"

#if IS_ENABLED(CONFIG_PCI_IO_CFG_EXT)
 static void set_EnableCf8ExtCfg(void)
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h
index 8ca9c8b..6e1806f 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.h
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h
@@ -16,17 +16,7 @@
 #ifndef INIT_CPUS_H
 #define INIT_CPUS_H

-#include <stdlib.h>
-#include <console/console.h>
-#include <arch/cpu.h>
-#include <cpu/x86/lapic.h>
-#include <cpu/x86/mtrr.h>
-#include <cpu/amd/msr.h>
-#include <cpu/amd/multicore.h>
-#include <reset.h>
 #include <northbridge/amd/amdfam10/raminit.h>
-#include <northbridge/amd/amdht/porting.h>
-#include "defaults.h"

#define NODE_HT(x) NODE_PCI(x,0)
 #define NODE_MP(x) NODE_PCI(x,1)
diff --git a/src/include/cpu/amd/multicore.h b/src/include/cpu/amd/multicore.h
index 0ddf866..b868093 100644
--- a/src/include/cpu/amd/multicore.h
+++ b/src/include/cpu/amd/multicore.h
@@ -16,6 +16,8 @@
 #ifndef CPU_AMD_QUADCORE_H
 #define CPU_AMD_QUADCORE_H

+#include <stdint.h>
+
 u32 read_nb_cfg_54(void);

struct node_core_id {
diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h
index 58f43f1..c4b7e6d3 100644
--- a/src/northbridge/amd/amdmct/amddefs.h
+++ b/src/northbridge/amd/amdmct/amddefs.h
@@ -16,6 +16,9 @@
 #ifndef AMDDEFS_H
 #define AMDDEFS_H

+#include <stdint.h>
+#include <device/pci.h>
+
 /* FIXME: this file should be moved to include/cpu/amd/amddefs.h */

/* Public Revisions - USE THESE VERSIONS TO MAKE COMPARE WITH CPULOGICALID RETURN VALUE*/