[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add platform callback for critical shutdown

[Subrata Banik (Code Review)]

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Ronak Kanabar.

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86226?usp=email )

Change subject: drivers/intel/fsp2_0: Add platform callback for critical shutdown
......................................................................

drivers/intel/fsp2_0: Add platform callback for critical shutdown

This commit adds the platform_is_critical_shutdown_needed callback to
the FSP API. This allows platforms to integrate low-battery handling
logic directly into the FSP silicon initialization process. By checking
for critical conditions (e.g., low battery) within this callback after
FSP silicon initialization, the platform can initiate a controlled
shutdown before proceeding with further boot stages, preventing abrupt
shutdowns later in the boot process.

BUG=b:339673254
TEST=Verified low battery boot event logging.

Change-Id: I2d6677d70dea3d24f5a19d70608fd21229a271a0
Signed-off-by: Subrata Banik 
---
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/silicon_init.c
2 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/86226/1

diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 971be0d..8285948 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -50,6 +50,13 @@
 /* Callbacks for SoC/Mainboard specific overrides */
 void platform_fsp_memory_multi_phase_init_cb(uint32_t phase_index);
 void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index);
+/*
+ * Platform specific callbacks for power-off handling.
+ *
+ * These callbacks allow the platform to determine if a power-off is
+ * necessary due to various reasons, such as low battery detection.
+ */
+void platform_is_critical_shutdown_needed(void);
 /* Check if MultiPhase Si Init is enabled */
 bool fsp_is_multi_phase_init_enabled(void);
 /*
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 1caf00f..6ef9ba4 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -29,6 +29,11 @@
    /* Leave for the SoC/Mainboard to implement if necessary. */
 }

+void __weak platform_is_critical_shutdown_needed(void)
+{
+	/* Platform specific callbacks for power-off handling. */
+}
+
 /* FSP Specification < 2.2 has only 1 stage like FspSiliconInit. FSP specification >= 2.2
  * has multiple stages as below.
  */
@@ -254,6 +259,9 @@
    fsps_load();
    do_silicon_init(&fsps_hdr);

+	if (CONFIG(CHROMEOS_LOW_BATTERY_INDICATOR_SCREEN))
+		platform_is_critical_shutdown_needed();
+
    if (CONFIG(CACHE_MRC_SETTINGS) && CONFIG(FSP_NVS_DATA_POST_SILICON_INIT))
    	save_memory_training_data();