Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Ryan Chuang.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56105 )
Change subject: vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for enter/exit S0 stability
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Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56105/comment/665dd66e_bf533717
PS2, Line 7: vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for enter/exit S0 stability
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