Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
soc/intel/intelblocks/gpio: Always expose GPIO PM constants
These constants are needed in some ASL files, even when __ACPI__ is defined.
Change-Id: I0f4f00b93d5d45794b7c9e0f72b51f3191eb3902 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/common/block/include/intelblocks/gpio.h 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/34177/1
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index a2cccc7..9b351a9 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -20,9 +20,6 @@ #include <soc/gpio.h> #include "gpio_defs.h"
-#ifndef __ACPI__ -#include <types.h> - /* GPIO community IOSF sideband clock gating */ #define MISCCFG_GPSIDEDPCGEN (1 << 5) /* GPIO community RCOMP clock gating */ @@ -40,6 +37,9 @@ MISCCFG_GPRCOMPCDLCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN \ | MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN)
+#ifndef __ACPI__ +#include <types.h> + /* * GPIO numbers may not be contiguous and instead will have a different * starting pin number for each pad group.
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
Patch Set 3: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
Patch Set 3: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
Patch Set 4: Code-Review+2
Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
Patch Set 5: Code-Review+2
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34177 )
Change subject: soc/intel/intelblocks/gpio: Always expose GPIO PM constants ......................................................................
soc/intel/intelblocks/gpio: Always expose GPIO PM constants
These constants are needed in some ASL files, even when __ACPI__ is defined.
Change-Id: I0f4f00b93d5d45794b7c9e0f72b51f3191eb3902 Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/34177 Reviewed-by: Lance Zhao lance.zhao@gmail.com Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Paul Fagerburg pfagerburg@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/include/intelblocks/gpio.h 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Subrata Banik: Looks good to me, approved Lance Zhao: Looks good to me, approved Paul Fagerburg: Looks good to me, approved
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index a2cccc7..9b351a9 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -20,9 +20,6 @@ #include <soc/gpio.h> #include "gpio_defs.h"
-#ifndef __ACPI__ -#include <types.h> - /* GPIO community IOSF sideband clock gating */ #define MISCCFG_GPSIDEDPCGEN (1 << 5) /* GPIO community RCOMP clock gating */ @@ -40,6 +37,9 @@ MISCCFG_GPRCOMPCDLCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN \ | MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN)
+#ifndef __ACPI__ +#include <types.h> + /* * GPIO numbers may not be contiguous and instead will have a different * starting pin number for each pad group.