Attention is currently required from: Tarun Tuli, Martin L Roth, Subrata Banik, Andrey Petrov.
Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69757 )
Change subject: [RFC] Pull ligfxinit in romstage ......................................................................
[RFC] Pull ligfxinit in romstage
Change-Id: If3357e746a7d94afe9d285c36ed6172c7bfd9718 Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M Makefile M src/arch/x86/car.ld M src/console/Makefile.inc M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/gma/Kconfig M src/drivers/intel/gma/Makefile.inc M src/drivers/pc80/vga/Makefile.inc M src/include/adainit.h M src/lib/Kconfig M src/lib/Makefile.inc M src/lib/gnat/Makefile.inc M src/mainboard/google/brya/Makefile.inc M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/common/block/graphics/graphics.c 16 files changed, 271 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/69757/1
diff --git a/Makefile b/Makefile index 58cd85b..d09032d 100644 --- a/Makefile +++ b/Makefile @@ -315,6 +315,9 @@ ifeq ($(CONFIG_RAMSTAGE_ADA),y) ramstage-srcs += $(obj)/ramstage/$(notdir $(KCONFIG_AUTOADS)) endif +ifeq ($(CONFIG_ROMSTAGE_ADA),y) +romstage-srcs += $(obj)/romstage/$(notdir $(KCONFIG_AUTOADS)) +endif
# To track dependencies, we need all Ada specification (.ads) files in # *-srcs. Extract / filter all specification files that have a matching diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 47afd78..604fe35 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -67,6 +67,7 @@ *(.bss.*) *(.sbss) *(.sbss.*) + *(.data.*) . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _ebss = .; RECORD_SIZE(bss) @@ -118,8 +119,7 @@
. = 0xffffff00; .illegal_globals . : { - *(.data) - *(.data.*) + }
_bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full"); diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index e2a20d7..4296426 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -5,6 +5,8 @@ ifeq ($(CONFIG_HWBASE_DEBUG_CB),y) ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.ads ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.adb +romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.ads +romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.adb endif
smm-$(CONFIG_DEBUG_SMI) += init.c console.c vtxprintf.c printk.c diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 8c36063..b40b540 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -39,6 +39,14 @@ 1. Added ExtendedImageRevision field in FSP_INFO_HEADER 2. Added FSP_NON_VOLATILE_STORAGE_HOB2
+config DISPLAY_MSG_DURING_MEMORY_TRAINING + bool + default n + depends on GFX_GMA && VGA + help + Display a message on-screen notifying the end-user that + memory training is in progress + if PLATFORM_USES_FSP2_0
config PLATFORM_USES_FSP2_X86_32 diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 99b0fea..cf5a3bd 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -3,10 +3,16 @@ #include <arch/null_breakpoint.h> #include <arch/symbols.h> #include <assert.h> +#include <drivers/intel/gma/libgfxinit.h> +#include <arch/cpu.h> +#include <arch/io.h> +#include <bootmode.h> #include <cbfs.h> #include <cbmem.h> #include <cf9_reset.h> #include <console/console.h> +#include <cpu/x86/msr.h> +#include <device/mmio.h> #include <elog.h> #include <fsp/api.h> #include <fsp/util.h> @@ -23,10 +29,42 @@ #include <timestamp.h> #include <types.h> #include <vb2_api.h> +#include <mode_switch.h> +#include <drivers/intel/gma/i915_reg.h> +#include <arch/mmio.h> +#include <pc80/vga.h> +#include <pc80/vga_io.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> +#include <device/pci.h> +#include <timer.h> +#include <inttypes.h> +#include <delay.h> +#include <adainit.h>
static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));
static void save_memory_training_data(uint32_t fsp_version) + +static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); + +static void wait_txt_clear(void) +{ + struct cpuid_result cp = cpuid_ext(1, 0); + + /* Check if TXT is supported */ + if (!(cp.ecx & (1 << 6))) + return; + + /* Some TXT public bit */ + if (!(read32((void *)0xfed30010) & 1)) + return; + + /* Wait for TXT clear */ + while (!(read8((void *)0xfed40000) & (1 << 7))) + ; +} +static void save_memory_training_data(bool s3wake, uint32_t fsp_version) { size_t mrc_data_size; const void *mrc_data; @@ -221,6 +259,109 @@ struct memranges memmap; };
+static void panel_init(void) +{ + uint32_t cycle_delay_ms = 500; + uint32_t up_delay_ms = 200; + uint32_t backlight_on_delay_ms = 1; + uint32_t down_delay_ms = 50; + uint32_t backlight_off_delay_ms = 200; + uint32_t backlight_pwm_hz = 200; + void *mmio = (void *)0x81000000; + uint32_t reg32; + unsigned int pwm_period, pwm_polarity, pwm_duty; + + reg32 = ((DIV_ROUND_UP(cycle_delay_ms, 100) + 1) & 0x1f) << 4; + reg32 |= PANEL_POWER_RESET; + write32(mmio + PCH_PP_CONTROL, reg32); + + reg32 = ((up_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (backlight_on_delay_ms * 10) & 0x1fff; + write32(mmio + PCH_PP_ON_DELAYS, reg32); + + reg32 = ((down_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (backlight_off_delay_ms * 10) & 0x1fff; + write32(mmio + PCH_PP_OFF_DELAYS, reg32); + + /* Backlight */ + if (backlight_pwm_hz) { + printk(BIOS_DEBUG, "J2M: Initalizing backlight\n"); + pwm_polarity = 0; + pwm_period = DIV_ROUND_CLOSEST(CONFIG_CPU_XTAL_HZ, backlight_pwm_hz); + pwm_duty = DIV_ROUND_CLOSEST(pwm_period, 2); /* Start with 50 % */ + + write32(mmio + BXT_BLC_PWM_FREQ(0), pwm_period); + write32(mmio + BXT_BLC_PWM_CTL(0), pwm_polarity); + write32(mmio + BXT_BLC_PWM_DUTY(0), pwm_duty); + } +} + +static void mrc_splash_screen(void) +{ + int lightup_ok; + + /* + * We can generally jump between C and Ada code back and forth + * without trouble. But since we don't have an Ada main() we + * have to do some Ada package initializations that GNAT would + * do there. This has to be done before calling any Ada code. + * + * The package initializations should not have any dependen- + * cies on C code. So we can call them here early, and don't + * have to worry at which point we can start to use Ada. + */ + printk(BIOS_DEBUG, "J2M: About to call romstage_adainit()\n"); + romstage_adainit(); + printk(BIOS_DEBUG, "J2M: Done.\n"); + + /* Unlock memory before accessing 0xB8000 (VGA Frame buffer) address*/ + msr_t msrval; + wait_txt_clear(); + msrval.lo = 0; + msrval.hi = 0; + wrmsr(0x2e6, msrval); + + pci_write_config16(PCI_DEV(0, 0, 0), PCI_COMMAND, 6); + printk(BIOS_DEBUG, "J2M: About to perform panel initialization...\n"); + + printk(BIOS_DEBUG, "J2M: panel initialization done.\n"); + pci_or_config16(PCI_DEV(0, 2, 0), PCI_COMMAND, PCI_COMMAND_MASTER); + + printk(BIOS_DEBUG, "J2M: %s - pci_read_config32(PCI_DEV(2, 0), 0x0)=0x%x\n", + __func__, pci_read_config32(PCI_DEV(0, 2, 0), 0x0)); + pci_write_config32(PCI_DEV(0, 2, 0), 0x10, 0x81000004); + pci_write_config32(PCI_DEV(0, 2, 0), 0x18, 0x9000000c); + pci_write_config32(PCI_DEV(0, 2, 0), 0x20, 0x1001); + pci_write_config16(PCI_DEV(0, 2, 0), PCI_COMMAND, 3); + printk(BIOS_DEBUG, "J2M: %s - pci_read_config32(PCI_DEV(2, 0), 0x10)=0x%x\n", + __func__, pci_read_config32(PCI_DEV(0, 2, 0), 0x10)); + printk(BIOS_DEBUG, "J2M: %s - pci_read_config32(PCI_DEV(2, 0), 0x18)=0x%x\n", + __func__, pci_read_config32(PCI_DEV(0, 2, 0), 0x18)); + printk(BIOS_DEBUG, "J2M: %s - pci_read_config32(PCI_DEV(2, 0), 0x20)=0x%x\n", + __func__, pci_read_config32(PCI_DEV(0, 2, 0), 0x20)); + + panel_init(); + + printk(BIOS_DEBUG, "J2M: PCH_PP_ON_DELAYS - 0x810c7208=0x%x", *(volatile uint32_t *)0x810c7208); + + printk(BIOS_DEBUG, "J2M: About to run libgfxinit...\n"); + gma_gfxinit(&lightup_ok); + gfx_set_init_done(lightup_ok); + if (!lightup_ok) { + printk(BIOS_DEBUG, "J2M: libgfxinit failed.\n"); + return; + } + printk(BIOS_DEBUG, "J2M: libgfxinit done.\n"); + + vga_textmode_init(); + for (size_t line = 0 ; line < 20; line++) + vga_line_write(line, "Welcome to ROMSTAGE !"); + + printk(BIOS_DEBUG, "J2M: Going to wait for 10s...\n"); + udelay(10 * 1000 * 1000); + printk(BIOS_DEBUG, "J2M: Done. Resuming boot now.\n"); +} + static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) { uint32_t status; @@ -286,6 +427,8 @@ if (CONFIG(MMA)) setup_mma(&fspm_upd.FspmConfig);
+ printk(BIOS_DEBUG, "J2M: Right before memory training init\n"); + mrc_splash_screen(); post_code(POST_MEM_PREINIT_PREP_END);
/* Call FspMemoryInit */ diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig index d0aff4c..c9a5360 100644 --- a/src/drivers/intel/gma/Kconfig +++ b/src/drivers/intel/gma/Kconfig @@ -88,7 +88,8 @@ || SOC_INTEL_COMMON_SKYLAKE_BASE || SOC_INTEL_APOLLOLAKE \ || SOC_INTEL_CANNONLAKE_BASE || SOC_INTEL_ALDERLAKE depends on MAINBOARD_USE_LIBGFXINIT || INTEL_GMA_LIBGFXINIT_EDID - select RAMSTAGE_LIBHWBASE + select ROMSTAGE_LIBHWBASE if DISPLAY_MSG_DURING_MEMORY_TRAINING + select RAMSTAGE_LIBHWBASE if !DISPLAY_MSG_DURING_MEMORY_TRAINING
config GFX_GMA_PANEL_1_ON_EDP bool diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index 5588e5a..355a7f0 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -22,6 +22,8 @@
ifeq ($(CONFIG_GFX_GMA),y)
+ifeq ($(CONFIG_RAMSTAGE_LIBHWBASE),y) + $(call add-special-class,gfxinit) gfxinit-handler = $(eval ramstage-srcs += $(1)$(2))
@@ -46,4 +48,35 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += text_fb/gma-gfx_init.adb endif
+endif # CONFIG_RAMSTAGE_LIBHWBASE + +ifeq ($(CONFIG_ROMSTAGE_LIBHWBASE),y) + +$(call add-special-class,gfxinit) +gfxinit-handler = \ + $(eval romstage-srcs += $(1)$(2)) + +$(call add-special-class,gfxinit-gen) +gfxinit-gen-handler = \ + $(eval additional-dirs += $(dir $(2))) \ + $(eval romstage-srcs += $(2)) \ + $(eval romstage-ads-deps += $(2)) \ + $(eval romstage-adb-deps += $(2)) \ + $(eval $(2): $(obj)/config.h) + +CONFIG_GFX_GMA_DEFAULT_MMIO := 0 # dummy, will be overwritten at runtime + +subdirs-y += ../../../../3rdparty/libgfxinit + +romstage-y += gma.ads gma.adb + +romstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-gfx_init.ads +ifeq ($(CONFIG_LINEAR_FRAMEBUFFER),y) +romstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += hires_fb/gma-gfx_init.adb +else +romstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += text_fb/gma-gfx_init.adb +endif + +endif # CONFIG_ROMSTAGE_LIBHWBASE + endif # CONFIG_GFX_GMA diff --git a/src/drivers/pc80/vga/Makefile.inc b/src/drivers/pc80/vga/Makefile.inc index 3e31de1..d5370bd 100644 --- a/src/drivers/pc80/vga/Makefile.inc +++ b/src/drivers/pc80/vga/Makefile.inc @@ -5,4 +5,9 @@ ramstage-$(CONFIG_VGA) += vga_font_8x16.c ramstage-$(CONFIG_VGA) += vga.c
+romstage-$(CONFIG_VGA) += vga_io.c +romstage-$(CONFIG_VGA) += vga_palette.c +romstage-$(CONFIG_VGA) += vga_font_8x16.c +romstage-$(CONFIG_VGA) += vga.c + endif diff --git a/src/include/adainit.h b/src/include/adainit.h index 4953d44..389499e 100644 --- a/src/include/adainit.h +++ b/src/include/adainit.h @@ -21,4 +21,10 @@ static inline void ramstage_adainit(void) {} #endif
+#if CONFIG(ROMSTAGE_ADA) +void romstage_adainit(void); +#else +static inline void romstage_adainit(void) {} +#endif + #endif /* _ADAINIT_H */ diff --git a/src/lib/Kconfig b/src/lib/Kconfig index ae96fc6..91726b0 100644 --- a/src/lib/Kconfig +++ b/src/lib/Kconfig @@ -10,12 +10,23 @@ help Selected by features that use Ada code in ramstage.
+config ROMSTAGE_ADA + bool + help + Selected by features that use Ada code in ramstage. + config RAMSTAGE_LIBHWBASE bool select RAMSTAGE_ADA help Selected by features that require `libhwbase` in ramstage.
+config ROMSTAGE_LIBHWBASE + bool + select ROMSTAGE_ADA + help + Selected by features that require `libhwbase` in ramstage. + config FLATTENED_DEVICE_TREE bool help @@ -63,7 +74,7 @@ help Name of the FMAP region created in the default FMAP to cache SPD data.
-if RAMSTAGE_LIBHWBASE +if RAMSTAGE_LIBHWBASE || ROMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO def_bool y diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 1c7bc22..bc26179 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -340,6 +340,7 @@ $(RMODTOOL) -i $< -o $@
ramstage-$(CONFIG_RAMSTAGE_ADA) += cb.ads +romstage-$(CONFIG_ROMSTAGE_ADA) += cb.ads
ifeq ($(CONFIG_RAMSTAGE_LIBHWBASE),y)
@@ -364,6 +365,30 @@
endif # CONFIG_RAMSTAGE_LIBHWBASE
+ifeq ($(CONFIG_ROMSTAGE_LIBHWBASE),y) + +to-ada-hex = $(eval $(1) := 16\#$(patsubst 0x%,%,$($(1)))\#) + +$(call to-ada-hex,CONFIG_HWBASE_DEFAULT_MMCONF) + +$(call add-special-class,hw) +hw-handler = \ + $(eval romstage-srcs += $$(addprefix $(1),$(2))) + +$(call add-special-class,hw-gen) +hw-gen-handler = \ + $(eval additional-dirs += $(dir $(2))) \ + $(eval romstage-srcs += $(2)) \ + $(eval romstage-ads-deps += $(2)) \ + $(eval romstage-adb-deps += $(2)) \ + $(eval $(2): $(obj)/config.h) + +subdirs-y += ../../3rdparty/libhwbase + +romstage-$(CONFIG_HAVE_MONOTONIC_TIMER) += hw-time-timer.adb + +endif # CONFIG_ROMSTAGE_LIBHWBASE + romstage-y += spd_bin.c
ifeq ($(CONFIG_HAVE_SPD_IN_CBFS),y) diff --git a/src/lib/gnat/Makefile.inc b/src/lib/gnat/Makefile.inc index 065ba71..f52c107 100644 --- a/src/lib/gnat/Makefile.inc +++ b/src/lib/gnat/Makefile.inc @@ -54,3 +54,6 @@ ifeq ($(CONFIG_RAMSTAGE_ADA),y) ramstage-libs += $(obj)/libgnat-$(ARCH-ramstage-y)/libgnat.a endif +ifeq ($(CONFIG_ROMSTAGE_ADA),y) +romstage-libs += $(obj)/libgnat-$(ARCH-ramstage-y)/libgnat.a +endif diff --git a/src/mainboard/google/brya/Makefile.inc b/src/mainboard/google/brya/Makefile.inc index 98a08f2..9b80342 100644 --- a/src/mainboard/google/brya/Makefile.inc +++ b/src/mainboard/google/brya/Makefile.inc @@ -20,4 +20,9 @@ CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/$(BASEBOARD_DIR)/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads \ No newline at end of file +ifeq ($(CONFIG_RAMSTAGE_ADA),y) +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +endif +ifeq ($(CONFIG_ROMSTAGE_ADA),y) +romstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +endif \ No newline at end of file diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index abd0570..2bd59a9 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -45,6 +45,7 @@
config CPU_SPECIFIC_OPTIONS def_bool y + select DISPLAY_MSG_DURING_MEMORY_TRAINING select ENABLE_TCSS_DISPLAY_DETECTION select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_USE_LIBGFXINIT @@ -76,7 +77,7 @@ select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE select INTEL_GMA_ACPI - select INTEL_GMA_ADD_VBT if RUN_FSP_GOP + select INTEL_GMA_ADD_VBT select INTEL_GMA_OPREGION_2_1 select MRC_SETTINGS_PROTECT select PARALLEL_MP_AP_WORK diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 26eba76..912528a 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -613,8 +613,8 @@ s_cfg->GraphicsConfigPtr = (uintptr_t)vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ - s_cfg->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD); - s_cfg->LidStatus = CONFIG(RUN_FSP_GOP); + s_cfg->PeiGraphicsPeimInit = is_devfn_enabled(SA_DEVFN_IGD); + s_cfg->LidStatus = 1; s_cfg->PavpEnable = CONFIG(PAVP); }
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index dae181a..36ec61e 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -39,8 +39,8 @@ If FSP has already run/configured the IGD, we can assume the panel/backlight control have already been set up sufficiently and that we shouldn't attempt to reconfigure things. */ - if (!CONFIG(RUN_FSP_GOP)) - graphics_soc_panel_init(dev); + /* if (!CONFIG(RUN_FSP_GOP)) */ + /* graphics_soc_panel_init(dev); */
if (CONFIG(SOC_INTEL_CONFIGURE_DDI_A_4_LANES) && !acpi_is_wakeup_s3()) { const u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A); @@ -68,11 +68,11 @@ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) { - if (!acpi_is_wakeup_s3() && display_init_required()) { - int lightup_ok; - gma_gfxinit(&lightup_ok); - gfx_set_init_done(lightup_ok); - } + /* if (!acpi_is_wakeup_s3() && display_init_required()) { */ + /* int lightup_ok; */ + /* gma_gfxinit(&lightup_ok); */ + /* gfx_set_init_done(lightup_ok); */ + /* } */ } else { /* Initialize PCI device, load/execute BIOS Option ROM */ pci_dev_init(dev);