Hello Paul Menzel,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/46021
to review the following change.
Change subject: mb/asus/f2a85-m_pro: Enable super-i/o LDNs 0x0f and 0x14 ......................................................................
mb/asus/f2a85-m_pro: Enable super-i/o LDNs 0x0f and 0x14
The LDNs don't have a 0x30 register to enable them. However, with the devices set to `off`, coreboot won't configure them.
Change-Id: Iaea37c88524904a1dae8a6d3b5f07c6ea25bc3b2 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/46021/1
diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index 654716b..4e124f2 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -97,10 +97,10 @@ end device pnp 2e.d off end # WDT1 device pnp 2e.e off end # CIR WAKE-UP - device pnp 2e.f off # GPIO Push-pull/Open-drain selection + device pnp 2e.f on # GPIO Push-pull/Open-drain selection irq 0xe6 = 7f end - device pnp 2e.14 off # PORT80 UART + device pnp 2e.14 on # PORT80 UART irq 0xe0 = 0x00 end device pnp 2e.16 off end # Deep Sleep
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46021 )
Change subject: mb/asus/f2a85-m_pro: Enable super-i/o LDNs 0x0f and 0x14 ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46021/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46021/2//COMMIT_MSG@7 PS2, Line 7: super-i/o nit: super I/O
Hello build bot (Jenkins), Paul Menzel, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46021
to look at the new patch set (#3).
Change subject: mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14 ......................................................................
mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14
The LDNs don't have a 0x30 register to enable them. However, with the devices set to `off`, coreboot won't configure them.
Change-Id: Iaea37c88524904a1dae8a6d3b5f07c6ea25bc3b2 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/46021/3
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46021 )
Change subject: mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46021/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46021/2//COMMIT_MSG@7 PS2, Line 7: super-i/o
nit: super I/O
Ack
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46021 )
Change subject: mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14 ......................................................................
mb/asus/f2a85-m_pro: Enable super-I/O LDNs 0x0f and 0x14
The LDNs don't have a 0x30 register to enable them. However, with the devices set to `off`, coreboot won't configure them.
Change-Id: Iaea37c88524904a1dae8a6d3b5f07c6ea25bc3b2 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/46021 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index 654716b..4e124f2 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -97,10 +97,10 @@ end device pnp 2e.d off end # WDT1 device pnp 2e.e off end # CIR WAKE-UP - device pnp 2e.f off # GPIO Push-pull/Open-drain selection + device pnp 2e.f on # GPIO Push-pull/Open-drain selection irq 0xe6 = 7f end - device pnp 2e.14 off # PORT80 UART + device pnp 2e.14 on # PORT80 UART irq 0xe0 = 0x00 end device pnp 2e.16 off end # Deep Sleep
-
Angel Pons (Code Review) -
Nico Huber (Code Review)