Change in ...coreboot[master]: soc/intel/cannonlake: Clear SUS_PWR_FLR status bit

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31902 )

Change subject: soc/intel/cannonlake: Clear SUS_PWR_FLR status bit
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Patch Set 3:

(1 comment)

https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c 
File src/soc/intel/cannonlake/pmutil.c:

https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c@14... 
PS3, Line 146: pmc_clear_suspwrflr
> makes sense, If FSP is relying on these values we have to make we clear these after FSP is done init […]

the appropriate place would be pch_finalize(), by that point FSP notify is also done.