Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27639
Change subject: Stoneyridge: Remove IMC support ......................................................................
Stoneyridge: Remove IMC support
An agreement between AMD and Google decided to remove all support to IMC. All boards will use external EC. Remove all stoney IMC files and functions from coreboot.
BUG=b:111780177 TEST=Build grunt and gardenia
Change-Id: I1bda0ac7f8f8f5bb1403396d6703a4fac6f60f88 Signed-off-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/mainboard/amd/gardenia/BiosCallOuts.c M src/mainboard/amd/gardenia/Makefile.inc D src/mainboard/amd/gardenia/fchec.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/soc/amd/stoneyridge/Makefile.inc D src/soc/amd/stoneyridge/acpi/AmdImc.asl M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl D src/soc/amd/stoneyridge/imc.c D src/soc/amd/stoneyridge/include/fchec.h D src/soc/amd/stoneyridge/include/soc/imc.h M src/soc/amd/stoneyridge/southbridge.c M src/soc/amd/stoneyridge/spi.c D src/vendorcode/amd/pi/00670F00/Lib/imc/HwmLateService.c D src/vendorcode/amd/pi/00670F00/Lib/imc/ImcLib.c M src/vendorcode/amd/pi/00670F00/Makefile.inc M src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h 16 files changed, 2 insertions(+), 831 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/27639/1
diff --git a/src/mainboard/amd/gardenia/BiosCallOuts.c b/src/mainboard/amd/gardenia/BiosCallOuts.c index 158642a..16ac549 100644 --- a/src/mainboard/amd/gardenia/BiosCallOuts.c +++ b/src/mainboard/amd/gardenia/BiosCallOuts.c @@ -15,31 +15,13 @@
#include <amdblocks/agesawrapper.h> #include <amdblocks/BiosCallOuts.h> -#include <soc/imc.h> #include <soc/southbridge.h> #include <stdlib.h> #include <string.h>
-/* Hardware Monitor Fan Control - * Hardware limitation: - * HWM will fail to read the input temperature via I2C if other - * software switches the I2C address. AMD recommends using IMC - * to control fans, instead of HWM. - */ void oem_fan_control(FCH_DATA_BLOCK *FchParams) { - /* Enable IMC fan control. the recommand way */ - imc_reg_init();
- FchParams->Imc.ImcEnable = TRUE; - - /* 1 IMC, 0 HWM */ - FchParams->Hwm.HwmControl = 1; - - /* 2 disable IMC, 1 enable IMC, 0 following hw strap setting */ - FchParams->Imc.ImcEnableOverWrite = 1; - - memset(&FchParams->Imc.EcStruct, 0, sizeof(FCH_EC)); }
void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env) diff --git a/src/mainboard/amd/gardenia/Makefile.inc b/src/mainboard/amd/gardenia/Makefile.inc index 5ddfe45..dd71331 100644 --- a/src/mainboard/amd/gardenia/Makefile.inc +++ b/src/mainboard/amd/gardenia/Makefile.inc @@ -24,4 +24,3 @@ ramstage-y += BiosCallOuts.c ramstage-y += gpio.c ramstage-y += OemCustomize.c -ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += fchec.c diff --git a/src/mainboard/amd/gardenia/fchec.c b/src/mainboard/amd/gardenia/fchec.c deleted file mode 100644 index aca3a9e..0000000 --- a/src/mainboard/amd/gardenia/fchec.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "fchec.h" - -void agesawrapper_fchecfancontrolservice(void) -{ - FCH_DATA_BLOCK LateParams; - - /* Thermal Zone Parameter */ - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg0 = 0x00; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg1 = 0x00; /* Zone */ - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg2 = 0x3d; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg3 = 0xc6; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg4 = 0x00; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg5 = 0x04; - /* SMBUS Address for SMBUS based temperature sensor */ - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg6 = 0x98; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg7 = 0x01; - /* PWM steping rate in unit of PWM level percentage */ - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg8 = 0x01; - LateParams.Imc.EcStruct.MsgFun81Zone0MsgReg9 = 0x00; - - /* IMC Fan Policy temperature thresholds */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg0 = 0x00; - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg1 = 0x00; /* Zone */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg2 = 0x3c; /*AC0 threshold */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg3 = 0x28; /*AC1 in oC */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg4 = 0xff; /*AC2 in oC */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg5 = 0xff; /*AC3 undefined */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg6 = 0xff; /*AC4 undefined */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg7 = 0xff; /*AC5 undefined */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg8 = 0xff; /*AC6 undefined */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgReg9 = 0xff; /*AC7 undefined */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegA = 0x4b; /*crit threshold */ - LateParams.Imc.EcStruct.MsgFun83Zone0MsgRegB = 0x00; - - /* IMC Fan Policy PWM Settings */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg0 = 0x00; - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg1 = 0x00; /* Zone */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg2 = 0x50; /* AL0 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg3 = 0x32; /* AL1 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg4 = 0xff; /* AL2 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg5 = 0xff; /* AL3 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg6 = 0xff; /* AL4 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg7 = 0xff; /* AL5 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg8 = 0xff; /* AL6 percent */ - LateParams.Imc.EcStruct.MsgFun85Zone0MsgReg9 = 0xff; /* AL7 percent */ - - LateParams.Imc.EcStruct.IMCFUNSupportBitMap = 0x111; - - FchECfancontrolservice(&LateParams); -} diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index d2f7a32..e8e65d4 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -58,8 +58,6 @@ FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) - oem_fan_control(FchParams_env);
/* XHCI configuration */ if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE)) diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 5df4889..bf5724f 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -57,7 +57,6 @@ romstage-y += romstage.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c romstage-y += gpio.c -romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c romstage-y += monotonic_timer.c romstage-y += pmutil.c romstage-y += reset.c @@ -100,7 +99,6 @@ ramstage-y += monotonic_timer.c ramstage-y += southbridge.c ramstage-y += sb_util.c -ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c ramstage-y += lpc.c ramstage-y += northbridge.c ramstage-y += pmutil.c @@ -200,7 +198,6 @@ add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) -OPT_STONEYRIDGE_IMC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE), --imc) OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)
OPT_2AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey2) @@ -222,7 +219,6 @@
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ - $(call strip_quotes, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ @@ -243,7 +239,6 @@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \ - $(OPT_STONEYRIDGE_IMC_FWM_FILE) \ $(OPT_STONEYRIDGE_GEC_FWM_FILE) \ $(OPT_AMD_PUBKEY_FILE) \ $(OPT_PSPBTLDR_FILE) \ diff --git a/src/soc/amd/stoneyridge/acpi/AmdImc.asl b/src/soc/amd/stoneyridge/acpi/AmdImc.asl deleted file mode 100644 index 519b05c..0000000 --- a/src/soc/amd/stoneyridge/acpi/AmdImc.asl +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -//BTDC Due to IMC Fan, ACPI control codes -OperationRegion(IMIO, SystemIO, 0x3E, 0x02) -Field(IMIO , ByteAcc, NoLock, Preserve) { - IMCX,8, - IMCA,8 -} - -IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) { - Offset(0x80), - MSTI, 8, - MITS, 8, - MRG0, 8, - MRG1, 8, - MRG2, 8, - MRG3, 8, -} - -Method(WACK, 0) -{ - Store(0, Local0) - While (LNotEqual(Local0, 0xFA)) { - Store(MRG0, Local0) - Sleep(10) - } -} - -//Init -Method (ITZE, 0) -{ - Store(0, MRG0) - Store(0xB5, MRG1) - Store(0, MRG2) - Store(0x96, MSTI) - WACK() - - Store(0, MRG0) - Store(0, MRG1) - Store(0, MRG2) - Store(0x80, MSTI) - WACK() - - Or(MRG2, 0x01, Local0) - - Store(0, MRG0) - Store(0, MRG1) - Store(Local0, MRG2) - Store(0x81, MSTI) - WACK() -} diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl index e767fdd..4aba2f9 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl @@ -130,10 +130,6 @@ Return(CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */
-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM) - #include "acpi/AmdImc.asl" -#endif - /* * * FIRST METHOD CALLED UPON BOOT @@ -159,11 +155,6 @@ /* Determine the OS we're running on */ OSFL()
-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM) -#if IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE) - ITZE() /* enable IMC Fan Control*/ -#endif -#endif } /* End Method(_SB._INI) */
Method(OSFL, 0){ diff --git a/src/soc/amd/stoneyridge/imc.c b/src/soc/amd/stoneyridge/imc.c deleted file mode 100644 index 5d883d9..0000000 --- a/src/soc/amd/stoneyridge/imc.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define __SIMPLE_DEVICE__ - -#include <amdblocks/agesawrapper.h> -#include <soc/imc.h> -#include <arch/io.h> -#include <device/device.h> -#include <delay.h> - -#define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE) - -void imc_reg_init(void) -{ - u8 reg8; - /* Init Power Management Block 2 (PM2) Registers. - * Check BKDG for AMD Family 16h for details. */ - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x00), 0x06); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x01), 0x06); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x02), 0xf7); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x03), 0xff); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x04), 0xff); - - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x10), 0x06); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x11), 0x06); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x12), 0xf7); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x13), 0xff); - write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x14), 0xff); - - reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4); - reg8 &= 0x8f; - reg8 |= 0x10; - pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4, reg8); -} - -void enable_imc_thermal_zone(void) -{ - AMD_CONFIG_PARAMS StdHeader; - UINT8 FunNum; - UINT8 regs[10]; - int i; - - regs[0] = 0; - regs[1] = 0; - FunNum = Fun_80; - for (i = 0 ; i <= 1 ; i++) - WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); - WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); - WaitForEcLDN9MailboxCmdAck(&StdHeader); - - for (i = 2 ; i < ARRAY_SIZE(regs) ; i++) - ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); - - /* enable thermal zone 0 */ - regs[2] |= 1; - regs[0] = 0; - regs[1] = 0; - FunNum = Fun_81; - for (i = 0 ; i < ARRAY_SIZE(regs) ; i++) - WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader); - WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); - WaitForEcLDN9MailboxCmdAck(&StdHeader); -} - -void imc_sleep(void) -{ - ImcSleep(NULL); -} - -void imc_wakeup(void) -{ - ImcWakeup(NULL); -} diff --git a/src/soc/amd/stoneyridge/include/fchec.h b/src/soc/amd/stoneyridge/include/fchec.h deleted file mode 100644 index 80125ec..0000000 --- a/src/soc/amd/stoneyridge/include/fchec.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __AMD_STONEY_FCHEC__ -#define __AMD_STONEY_FCHEC__ - -#include <amdblocks/agesawrapper.h> -#include <soc/imc.h> - -void agesawrapper_fchecfancontrolservice(void); - -#endif diff --git a/src/soc/amd/stoneyridge/include/soc/imc.h b/src/soc/amd/stoneyridge/include/soc/imc.h deleted file mode 100644 index 079df79..0000000 --- a/src/soc/amd/stoneyridge/include/soc/imc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __STONEYRIDGE_IMC_H__ -#define __STONEYRIDGE_IMC_H__ - -void imc_reg_init(void); -void enable_imc_thermal_zone(void); -void imc_sleep(void); -void imc_wakeup(void); - -#endif diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 18e6c6c..e893cb7 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -25,10 +25,10 @@ #include <cbmem.h> #include <elog.h> #include <amdblocks/amd_pci_util.h> +#include <amdblocks/agesawrapper.h> #include <soc/southbridge.h> #include <soc/smi.h> #include <soc/amd_pci_int_defs.h> -#include <fchec.h> #include <delay.h> #include <soc/pci_devs.h> #include <agesa_headers.h> @@ -766,11 +766,6 @@ { uint8_t restored_power = PM_S5_AT_POWER_RECOVERY;
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) { - agesawrapper_fchecfancontrolservice(); - if (!IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE)) - enable_imc_thermal_zone(); - } if (IS_ENABLED(CONFIG_MAINBOARD_POWER_RESTORE)) restored_power = PM_RESTORE_S0_IF_PREV_S0; pm_write8(PM_RTC_SHADOW, restored_power); diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c index 718ad94..9baf433 100644 --- a/src/soc/amd/stoneyridge/spi.c +++ b/src/soc/amd/stoneyridge/spi.c @@ -29,7 +29,6 @@ #include <device/pci_ops.h> #include <soc/southbridge.h> #include <soc/pci_devs.h> -#include <soc/imc.h>
#define SPI_DEBUG_DRIVER IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
@@ -169,15 +168,11 @@
int chipset_volatile_group_begin(const struct spi_flash *flash) { - if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) - imc_sleep(); return 0; }
int chipset_volatile_group_end(const struct spi_flash *flash) { - if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) - imc_wakeup(); return 0; }
diff --git a/src/vendorcode/amd/pi/00670F00/Lib/imc/HwmLateService.c b/src/vendorcode/amd/pi/00670F00/Lib/imc/HwmLateService.c deleted file mode 100644 index 8800e38..0000000 --- a/src/vendorcode/amd/pi/00670F00/Lib/imc/HwmLateService.c +++ /dev/null @@ -1,188 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config FCH Hwm controller - * - * Init Hwm Controller features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e $Revision: 84150 $ @e $Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $ - * - */ -/* -***************************************************************************** -* - * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_HWM_FAMILY_YANGTZE_YANGTZEHWMLATESERVICE_FILECODE - -/** - * Table for Function Number - * - * - * - * - */ -STATIC UINT8 FunctionNumber[] = -{ - Fun_81, - Fun_83, - Fun_85, - Fun_89, -}; - -/** - * Table for Max Thermal Zone - * - * - * - * - */ -UINT8 MaxZone[] = -{ - 4, - 4, - 4, - 4, -}; - - -/** - * Table for Max Register - * - * - * - * - */ -UINT8 MaxRegister[] = -{ - MSG_REG9, - MSG_REGB, - MSG_REG9, - MSG_REGA, -}; - -/*------------------------------------------------------------------------------- -;Procedure: IsZoneFuncEnable -; -;Description: This routine will check every zone support function with BitMap from user define -; -; -;Exit: None -; -;Modified: None -; -;----------------------------------------------------------------------------- -*/ -STATIC BOOLEAN -IsZoneFuncEnable ( - IN UINT16 Flag, - IN UINT8 func, - IN UINT8 Zone - ) -{ - return (BOOLEAN) (((Flag >> (func *4)) & 0xF) & ((UINT8 )1 << Zone)); -} - -/*------------------------------------------------------------------------------- -;Procedure: FchECfancontrolservice -; -;Description: This routine service EC fan policy -; -; -;Exit: None -; -;Modified: None -; -;----------------------------------------------------------------------------- -*/ -VOID -FchECfancontrolservice ( - IN VOID *FchDataPtr - ) -{ - UINT8 ZoneNum; - UINT8 FunNum; - UINT8 RegNum; - UINT8 *CurPoint; - UINT8 FunIndex; - BOOLEAN IsSendEcMsg; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - if (!IsImcEnabled (StdHeader)) { - return; //IMC is not enabled - } - - CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0 + MaxZone[0] * (MaxRegister[0] - MSG_REG0 + 1); - - for ( FunIndex = 1; FunIndex <= 3; FunIndex++ ) { - FunNum = FunctionNumber[FunIndex]; - for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) { - IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum); - if (IsSendEcMsg) { - for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) { - WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader); - CurPoint += 1; - } - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number - WaitForEcLDN9MailboxCmdAck (StdHeader); - } else { - CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1); - } - } - } - - CurPoint = &LocalCfgPtr->Imc.EcStruct.MsgFun81Zone0MsgReg0; - for ( FunIndex = 0; FunIndex <= 0; FunIndex++ ) { - FunNum = FunctionNumber[FunIndex]; - for ( ZoneNum = 0; ZoneNum < MaxZone[FunIndex]; ZoneNum++ ) { - IsSendEcMsg = IsZoneFuncEnable (LocalCfgPtr->Imc.EcStruct.IMCFUNSupportBitMap, FunIndex, ZoneNum); - if (IsSendEcMsg) { - for ( RegNum = MSG_REG0; RegNum <= MaxRegister[FunIndex]; RegNum++ ) { - if (RegNum == MSG_REG2) { - *CurPoint &= 0xFE; - } - WriteECmsg (RegNum, AccessWidth8, CurPoint, StdHeader); - CurPoint += 1; - } - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &FunNum, StdHeader); // function number - WaitForEcLDN9MailboxCmdAck (StdHeader); - } else { - CurPoint += (MaxRegister[FunIndex] - MSG_REG0 + 1); - } - } - } -} diff --git a/src/vendorcode/amd/pi/00670F00/Lib/imc/ImcLib.c b/src/vendorcode/amd/pi/00670F00/Lib/imc/ImcLib.c deleted file mode 100644 index 3a5f8cd..0000000 --- a/src/vendorcode/amd/pi/00670F00/Lib/imc/ImcLib.c +++ /dev/null @@ -1,312 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * FCH IMC lib - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e $Revision: 87213 $ @e $Date: 2013-01-30 15:37:54 -0600 (Wed, 30 Jan 2013) $ - * - */ -/* -***************************************************************************** -* - * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" - -/** - * WriteECmsg - * - * - * - * @param[in] Address - Address - * @param[in] OpFlag - Access width - * @param[in] *Value - Out Value pointer - * @param[in] StdHeader - * - */ -VOID -WriteECmsg ( - IN UINT8 Address, - IN UINT8 OpFlag, - IN VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 Index; - - ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */ - OpFlag = (OpFlag & 0x7f) - 1; - if (OpFlag == 0x02) { - OpFlag = 0x03; - } - - for (Index = 0; Index <= OpFlag; Index++) { - /// EC_LDN9_MAILBOX_BASE_ADDRESS - LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader); - Address++; - /// EC_LDN9_MAILBOX_BASE_ADDRESS - LibAmdIoWrite (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader); - } -} - -/** - * ReadECmsg - * - * - * - * @param[in] Address - Address - * @param[in] OpFlag - Access width - * @param[out] *Value - Out Value pointer - * @param[in] StdHeader - * - */ -VOID -ReadECmsg ( - IN UINT8 Address, - IN UINT8 OpFlag, - OUT VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 Index; - - ASSERT (OpFlag < AccessWidth64); /* TODO: Add the assertion to make it not crash for now. */ - OpFlag = (OpFlag & 0x7f) - 1; - if (OpFlag == 0x02) { - OpFlag = 0x03; - } - - for (Index = 0; Index <= OpFlag; Index++) { - /// EC_LDN9_MAILBOX_BASE_ADDRESS - LibAmdIoWrite (AccessWidth8, MailBoxPort, &Address, StdHeader); - Address++; - /// EC_LDN9_MAILBOX_BASE_ADDRESS - LibAmdIoRead (AccessWidth8, MailBoxPort + 1, (UINT8 *)Value + Index, StdHeader); - } -} - -/** - * WaitForEcLDN9MailboxCmdAck - * - * - * @param[in] StdHeader - * - */ -VOID -WaitForEcLDN9MailboxCmdAck ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 Msgdata; - UINT16 Delaytime; - - Msgdata = 0; - - for (Delaytime = 0; Delaytime < 0xFFFF; Delaytime++) { - ReadECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader); - if ( Msgdata == 0xfa) { - break; - } - - FchStall (5, StdHeader); /// Wait for 1ms - } -} - -/** - * ImcSleep - IMC Sleep. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcSleep ( - IN VOID *FchDataPtr - ) -{ - UINT8 Msgdata; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - if (!(IsImcEnabled (StdHeader)) ) { - return; ///IMC is not enabled - } - - Msgdata = 0x00; - WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0xB4; - WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x00; - WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x96; - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader); - WaitForEcLDN9MailboxCmdAck (StdHeader); -} - -/** - * SoftwareDisableImc - Software disable IMC strap - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SoftwareDisableImc ( - IN VOID *FchDataPtr - ) -{ - UINT8 ValueByte; - UINT8 PortStatusByte; - UINT32 AbValue; - UINT32 ABStrapOverrideReg; - AMD_CONFIG_PARAMS *StdHeader; - - StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader; - GetChipSysMode (&PortStatusByte, StdHeader); - - RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGC8 + 3, AccessWidth8, 0x7F, BIT7, StdHeader); - ReadPmio (0xBF, AccessWidth8, &ValueByte, StdHeader); - - ReadMem ((ACPI_MMIO_BASE + MISC_BASE + FCH_MISC_REG80), AccessWidth32, &AbValue); - ABStrapOverrideReg = AbValue; - ABStrapOverrideReg &= ~BIT2; // bit2=0 EcEnableStrap - WriteMem ((ACPI_MMIO_BASE + MISC_BASE + 0x84), AccessWidth32, &ABStrapOverrideReg); - - ReadPmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader); - ValueByte |= BIT1; - WritePmio (FCH_PMIOA_REGD7, AccessWidth8, &ValueByte, StdHeader); - - ValueByte = 06; - LibAmdIoWrite (AccessWidth8, 0xcf9, &ValueByte, StdHeader); - FchStall (0xffffffff, StdHeader); -} - -/** - * ImcDisableSurebootTimer - IMC Disable Sureboot Timer. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcDisableSurebootTimer ( - IN VOID *FchDataPtr - ) -{ - UINT8 Msgdata; - AMD_CONFIG_PARAMS *StdHeader; - - StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader; - - if (!(IsImcEnabled (StdHeader)) ) { - return; ///IMC is not enabled - } - - ImcWakeup (FchDataPtr); - Msgdata = 0x00; - WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x01; - WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x00; - WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x94; - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader); - WaitForEcLDN9MailboxCmdAck (StdHeader); - ImcSleep (FchDataPtr); -} - -/** - * ImcWakeup - IMC Wakeup. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcWakeup ( - IN VOID *FchDataPtr - ) -{ - UINT8 Msgdata; - AMD_CONFIG_PARAMS *StdHeader; - - StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader; - if (!(IsImcEnabled (StdHeader)) ) { - return; ///IMC is not enabled - } - - Msgdata = 0x00; - WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0xB5; - WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x00; - WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x96; - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader); - WaitForEcLDN9MailboxCmdAck (StdHeader); -} - -/** - * ImcIdle - IMC Idle. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -ImcIdle ( - IN VOID *FchDataPtr - ) -{ - UINT8 Msgdata; - AMD_CONFIG_PARAMS *StdHeader; - - StdHeader = ((FCH_DATA_BLOCK *) FchDataPtr)->StdHeader; - - if (!(IsImcEnabled (StdHeader)) ) { - return; ///IMC is not enabled - } - - Msgdata = 0x00; - WriteECmsg (MSG_REG0, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x01; - WriteECmsg (MSG_REG1, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x00; - WriteECmsg (MSG_REG2, AccessWidth8, &Msgdata, StdHeader); - Msgdata = 0x98; - WriteECmsg (MSG_SYS_TO_IMC, AccessWidth8, &Msgdata, StdHeader); - WaitForEcLDN9MailboxCmdAck (StdHeader); -} diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc index 26a6007..bd807a9 100644 --- a/src/vendorcode/amd/pi/00670F00/Makefile.inc +++ b/src/vendorcode/amd/pi/00670F00/Makefile.inc @@ -94,11 +94,6 @@ agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Fch/Common/*.[cS]) endif agesa_raw_files += $(wildcard $(AGESA_ROOT)/Proc/Psp/PspBaseLib/*.[cS]) -ifeq ($(CONFIG_STONEYRIDGE_IMC_FWM),y) -agesa_raw_files += $(wildcard $(AGESA_ROOT)/Lib/imc/*.c) -agesa_raw_files += $(AGESA_ROOT)/Proc/Fch/Common/FchLib.c -agesa_raw_files += $(AGESA_ROOT)/Proc/Fch/Common/FchPeLib.c -endif
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h index c80dc52..42017bb 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h @@ -62,7 +62,6 @@ VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl); VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock); VOID GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); -BOOLEAN IsImcEnabled (IN AMD_CONFIG_PARAMS *StdHeader); VOID ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader); @@ -183,18 +182,14 @@
/// -/// Fch Imc Routines +/// Fch EC Routines /// /// Pei Phase /// -VOID FchInitResetImc (IN VOID *FchDataPtr); VOID FchInitResetEc (IN VOID *FchDataPtr); /// /// Dxe Phase /// -VOID FchInitEnvImc (IN VOID *FchDataPtr); -VOID FchInitMidImc (IN VOID *FchDataPtr); -VOID FchInitLateImc (IN VOID *FchDataPtr); VOID FchInitEnvEc (IN VOID *FchDataPtr); VOID FchInitMidEc (IN VOID *FchDataPtr); VOID FchInitLateEc (IN VOID *FchDataPtr); @@ -210,17 +205,6 @@ VOID ReadECmsg (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader); VOID WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader);
-VOID ImcSleep (IN VOID *FchDataPtr); -VOID ImcDisarmSurebootTimer (IN VOID *FchDataPtr); -VOID ImcDisableSurebootTimer (IN VOID *FchDataPtr); -VOID ImcWakeup (IN VOID *FchDataPtr); -VOID ImcIdle (IN VOID *FchDataPtr); -BOOLEAN ValidateImcFirmware (IN VOID *FchDataPtr); -VOID SoftwareToggleImcStrapping (IN VOID *FchDataPtr); -VOID ImcCrashReset (IN VOID *FchDataPtr); -VOID SoftwareDisableImc (IN VOID *FchDataPtr); - - /// /// Fch Ir Routines ///
-
Richard Spiegel (Code Review)