[S] Change in coreboot[main]: soc/intel/pantherlake: Refactor FSP-M params for debug message control

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85827?usp=email )

Change subject: soc/intel/pantherlake: Refactor FSP-M params for debug message control
......................................................................

soc/intel/pantherlake: Refactor FSP-M params for debug message control

The fsp_params.c file is refactored to move the debug message
control logic to a separate function, fsp_control_log_level().
This function takes an FSPM_UPD pointer and a boolean value
indicating whether debug messages should be enabled or disabled.

The fill_fsp_event_handler() function is updated to call
fsp_control_log_level() with the appropriate boolean value based on
the CONFIG(CONSOLE_SERIAL) and CONFIG(FSP_ENABLE_SERIAL_DEBUG)
Kconfig options.

BUG=b:227151510
TEST=Able to build and boot google/fatcat.

Change-Id: Ie2916ce82133058464d20eed327de7c7288e78a4
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85827
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/pantherlake/romstage/fsp_params.c
1 file changed, 24 insertions(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kapil Porwal: Looks good to me, approved

diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c
index 7076aef..57954e0 100644
--- a/src/soc/intel/pantherlake/romstage/fsp_params.c
+++ b/src/soc/intel/pantherlake/romstage/fsp_params.c
@@ -296,35 +296,44 @@
    	fill_fspm_params[i](m_cfg, config);
 }

-static void fill_fsp_event_handler(FSPM_ARCH2_UPD *arch_upd, FSP_M_CONFIG *m_cfg)
+static void fsp_control_log_level(FSPM_UPD *mupd, bool is_enabled)
 {
-	if (!CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
-		return;
+	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
+	FSPM_ARCHx_UPD *arch_upd = &mupd->FspmArchUpd;

-	if (!CONFIG(CONSOLE_SERIAL) || !CONFIG(FSP_ENABLE_SERIAL_DEBUG)) {
+	if (is_enabled) {
+		enum fsp_log_level log_level = fsp_map_console_log_level();
+		arch_upd->FspEventHandler = (uintptr_t)((FSP_EVENT_HANDLER *)fsp_debug_event_handler);
+		/* Set Serial debug message level */
+		m_cfg->PcdSerialDebugLevel = log_level;
+		/* Set MRC debug level */
+		m_cfg->SerialDebugMrcLevel = log_level;
+	} else {
    	/* Disable Serial debug message */
    	m_cfg->PcdSerialDebugLevel = 0;
    	/* Disable MRC debug message */
    	m_cfg->SerialDebugMrcLevel = 0;
-		return;
    }
+}

-	enum fsp_log_level log_level = fsp_map_console_log_level();
-	arch_upd->FspEventHandler = (uintptr_t)((FSP_EVENT_HANDLER *)fsp_debug_event_handler);
-	/* Set Serial debug message level */
-	m_cfg->PcdSerialDebugLevel = log_level;
-	/* Set MRC debug level */
-	m_cfg->SerialDebugMrcLevel = log_level;
+static void fill_fsp_event_handler(FSPM_UPD *mupd)
+{
+	bool fsp_debug_enable = false;
+
+	if (CONFIG(CONSOLE_SERIAL) && CONFIG(FSP_ENABLE_SERIAL_DEBUG))
+		fsp_debug_enable = true;
+
+	fsp_control_log_level(mupd, fsp_debug_enable);
 }

void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
    const struct soc_intel_pantherlake_config *config = config_of_soc();
-	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
-	FSPM_ARCH2_UPD *arch_upd = &mupd->FspmArchUpd;

-	fill_fsp_event_handler(arch_upd, m_cfg);
-	soc_memory_init_params(m_cfg, config);
+	if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
+		fill_fsp_event_handler(mupd);
+
+	soc_memory_init_params(&mupd->FspmConfig, config);
    mainboard_memory_init_params(mupd);
 }