Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54378 )
Change subject: mb/asus/h61-series: Consolidate devicetree SATA options ......................................................................
mb/asus/h61-series: Consolidate devicetree SATA options
The H61 PCH only supports 4 SATA ports, and does not support Gen3.
Change-Id: I3e060ca6904fd6c773c322988a17bbca28333a3d Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/devicetree.cb M src/mainboard/asus/h61-series/variants/p8h61-m_pro/devicetree.cb 2 files changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/54378/1
diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/devicetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/devicetree.cb index 9ad8661..62dbb37 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/devicetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/devicetree.cb @@ -19,7 +19,7 @@ chip southbridge/intel/bd82x6x register "c2_latency" = "0x0065" register "gen1_dec" = "0x000c0291" - register "sata_port_map" = "0x3f" + register "sata_port_map" = "0x33" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005"
diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/devicetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/devicetree.cb index e1edde7..b1292e7 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/devicetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/devicetree.cb @@ -18,7 +18,6 @@ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "gen1_dec" = "0x000c0291" # HWM - register "sata_interface_speed_support" = "0x3" register "sata_port_map" = "0x33" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005"
-
Angel Pons (Code Review)