Attention is currently required from: Marc Jones, Furquan Shaikh, Martin Roth, Jonathan Zhang, Johnny Lin, Rocky Phagura, Stefan Reinauer, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Jonathan Zhang, Jay Talbott, Johnny Lin, Rocky Phagura, Stefan Reinauer, Rocky Phagura, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/49849
to look at the new patch set (#4).
Change subject: soc/intel/xeon_sp: Add PCH lockdown ......................................................................
soc/intel/xeon_sp: Add PCH lockdown
Add SOC_INTEL_COMMON_PCH_LOCKDOWN to meet security requirement. LOCKDOWN has dependencies on SOC_INTEL_COMMON_PCH_BASE and several other common block devices, so we also add those, while skipping devices and features that are not supported by the xeon_sp (LWB) PCH.
Adds the following common devices: SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG SOC_INTEL_COMMON_BLOCK_CSE SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG SOC_INTEL_COMMON_BLOCK_ITSS PMC_GLOBAL_RESET_ENABLE_LOCK SOC_INTEL_COMMON_BLOCK_SATA SOC_INTEL_COMMON_BLOCK_SMBUS SOC_INTEL_COMMON_BLOCK_XHCI
Change-Id: Iab97123e487f4f13f874f364a9c51723d234d4f0 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/common/pch/Kconfig M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/Makefile.inc M src/soc/intel/xeon_sp/cpx/chip.c M src/soc/intel/xeon_sp/include/soc/iomap.h A src/soc/intel/xeon_sp/include/soc/itss.h A src/soc/intel/xeon_sp/include/soc/me.h M src/soc/intel/xeon_sp/include/soc/pmc.h A src/soc/intel/xeon_sp/lockdown.c M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h 10 files changed, 142 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/49849/4