[L] Change in coreboot[main]: Add support for MiTAC Computing Whitestone-2 mainboard

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Lean Sheng Tan, Mark Chang, Patrick Rudolph, [e-mail].

Shuo Liu has posted comments on this change by Mark Chang. ( https://review.coreboot.org/c/coreboot/+/85532?usp=email )

Change subject: Add support for MiTAC Computing Whitestone-2 mainboard
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Patch Set 1: Code-Review+1

(7 comments)

File src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl:

https://review.coreboot.org/c/coreboot/+/85532/comment/4a5d61b2_c87c4083?usp... :
PS1, Line 4: #include <soc/intel/common/acpi/acpi_wake_source.asl>
Not needed for this?

https://review.coreboot.org/c/coreboot/+/85532/comment/9684fb42_c587d3d2?usp... :
PS1, Line 13: }
#include <arch/x86/post.asl>?

https://review.coreboot.org/c/coreboot/+/85532/comment/b53416eb_ba8f4767?usp... :
PS1, Line 30: 
Suppose the sleep/wake is not supported so no needed?

File src/mainboard/mitaccomputing/whitestone-2/bootblock.c:

https://review.coreboot.org/c/coreboot/+/85532/comment/9beb5462_32207b30?usp... :
PS1, Line 23: 	 * For that end it is wired into BMC virtual port.
Is SUART2 has s port IO map as SUART1?

File src/mainboard/mitaccomputing/whitestone-2/mainboard.c:

https://review.coreboot.org/c/coreboot/+/85532/comment/be92fc9f_888fe9c9?usp... :
PS1, Line 46: }
Can the common codes be used? smbios_write_type41

https://review.coreboot.org/c/coreboot/+/85532/comment/42c8d4d1_28a000a0?usp... :
PS1, Line 71: }
Will this duplicate with smbios_generate_type41_from_devtree?

https://review.coreboot.org/c/coreboot/+/85532/comment/f6ea0711_40d707af?usp... :
PS1, Line 80: };
How this be invoked?