Change in coreboot[master]: nb/intel/sandybridge: Deduplicate normalize_tclk

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39778 )

Change subject: nb/intel/sandybridge: Deduplicate normalize_tclk
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nb/intel/sandybridge: Deduplicate normalize_tclk

Sandy Bridge does not support the 100 MHz refclk at all, so both
implementations are equivalent. This might become an issue if additional
speeds are added, but the fuses aren't being treated properly anyway.

Tested on Asus P8Z77-V LX2, still boots fine with an i7-2600.

Change-Id: I015d2ed08709c80c09ec7e9627e9be00cbbd72e5
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/sandybridge/raminit.c
1 file changed, 2 insertions(+), 36 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/39778/1

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 9b0010c..0d2169f 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -337,7 +337,7 @@
    	return frq_comp2_map[0][FRQ - 3];
 }

-static void ivb_normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support)
+static void normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support)
 {
    if (ctrl->tCK <= TCK_1200MHZ) {
    	ctrl->tCK = TCK_1200MHZ;
@@ -380,44 +380,10 @@
    if (!ref_100mhz_support && ctrl->base_freq == 100) {
    	/* Skip unsupported frequency */
    	ctrl->tCK++;
-		ivb_normalize_tclk(ctrl, ref_100mhz_support);
+		normalize_tclk(ctrl, ref_100mhz_support);
    }
 }

-static void snb_normalize_tclk(ramctr_timing *ctrl)
-{
-	if (ctrl->tCK <= TCK_1066MHZ) {
-		ctrl->tCK = TCK_1066MHZ;
-		ctrl->base_freq = 133;
-	} else if (ctrl->tCK <= TCK_933MHZ) {
-		ctrl->tCK = TCK_933MHZ;
-		ctrl->base_freq = 133;
-	} else if (ctrl->tCK <= TCK_800MHZ) {
-		ctrl->tCK = TCK_800MHZ;
-		ctrl->base_freq = 133;
-	} else if (ctrl->tCK <= TCK_666MHZ) {
-		ctrl->tCK = TCK_666MHZ;
-		ctrl->base_freq = 133;
-	} else if (ctrl->tCK <= TCK_533MHZ) {
-		ctrl->tCK = TCK_533MHZ;
-		ctrl->base_freq = 133;
-	} else if (ctrl->tCK <= TCK_400MHZ) {
-		ctrl->tCK = TCK_400MHZ;
-		ctrl->base_freq = 133;
-	} else {
-		ctrl->tCK = 0;
-	}
-}
-
-static void normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support)
-{
-	if (IS_SANDY_CPU(ctrl->cpu))
-		snb_normalize_tclk(ctrl);
-
-	else
-		ivb_normalize_tclk(ctrl, ref_100mhz_support);
-}
-
 static void find_cas_tck(ramctr_timing *ctrl)
 {
    u8 val;

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/39778 )

Change subject: nb/intel/sandybridge: Deduplicate normalize_tclk
......................................................................

Abandoned

Got molten into some other changes