Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35861 )
Change subject: intel/dcp847ske: use functions from hwm5_conf.h for HWM setup ......................................................................
intel/dcp847ske: use functions from hwm5_conf.h for HWM setup
Change-Id: I67de5260a756fc7b1cf0ec1903bee0058a2dcb06 Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/intel/dcp847ske/superio.h 1 file changed, 2 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/35861/1
diff --git a/src/mainboard/intel/dcp847ske/superio.h b/src/mainboard/intel/dcp847ske/superio.h index 56938e7..6f74d3e 100644 --- a/src/mainboard/intel/dcp847ske/superio.h +++ b/src/mainboard/intel/dcp847ske/superio.h @@ -18,6 +18,7 @@ #define DCP847SKE_SUPERIO_H
#include <arch/io.h> +#include <superio/hwm5_conf.h>
#define NUVOTON_PORT 0x4e #define HWM_PORT 0x0a30 @@ -44,11 +45,6 @@
#define SUPERIO_WRITE_INITVAL(val) SUPERIO_WRITE((val) >> 8, (val) & 0xff)
-#define HWM_WRITE(reg, data) do { \ - outb((reg), HWM_PORT + 5); \ - outb((data), HWM_PORT + 6); \ -} while (0) - -#define HWM_WRITE_INITVAL(val) HWM_WRITE((val) >> 8, (val) & 0xff) +#define HWM_WRITE_INITVAL(val) pnp_write_hwm5_index(HWM_PORT, (val) >> 8, (val) & 0xff)
#endif /* DCP847SKE_SUPERIO_H */
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35861 )
Change subject: intel/dcp847ske: use functions from hwm5_conf.h for HWM setup ......................................................................
Patch Set 1: Code-Review+1
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35861 )
Change subject: intel/dcp847ske: use functions from hwm5_conf.h for HWM setup ......................................................................
intel/dcp847ske: use functions from hwm5_conf.h for HWM setup
Change-Id: I67de5260a756fc7b1cf0ec1903bee0058a2dcb06 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/35861 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/mainboard/intel/dcp847ske/superio.h 1 file changed, 2 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/mainboard/intel/dcp847ske/superio.h b/src/mainboard/intel/dcp847ske/superio.h index 56938e7..6f74d3e 100644 --- a/src/mainboard/intel/dcp847ske/superio.h +++ b/src/mainboard/intel/dcp847ske/superio.h @@ -18,6 +18,7 @@ #define DCP847SKE_SUPERIO_H
#include <arch/io.h> +#include <superio/hwm5_conf.h>
#define NUVOTON_PORT 0x4e #define HWM_PORT 0x0a30 @@ -44,11 +45,6 @@
#define SUPERIO_WRITE_INITVAL(val) SUPERIO_WRITE((val) >> 8, (val) & 0xff)
-#define HWM_WRITE(reg, data) do { \ - outb((reg), HWM_PORT + 5); \ - outb((data), HWM_PORT + 6); \ -} while (0) - -#define HWM_WRITE_INITVAL(val) HWM_WRITE((val) >> 8, (val) & 0xff) +#define HWM_WRITE_INITVAL(val) pnp_write_hwm5_index(HWM_PORT, (val) >> 8, (val) & 0xff)
#endif /* DCP847SKE_SUPERIO_H */