[coreboot-gerrit] Change in coreboot[master]: mb/google/puff: [WIP] Add power sequencing for LSPCON

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37948 )

Change subject: mb/google/puff: [WIP] Add power sequencing for LSPCON
......................................................................

mb/google/puff: [WIP] Add power sequencing for LSPCON

Toggle power down and reset pins for LSPCON.

BUG=None
BRANCH=None
TEST=ChromeOS display and firmware screens are displayed on HDMI display
connected to the HDMI (LSPCON) port1 on puff.

Change-Id: I336d8b72fcd44a0d03ee7f277eb5e838e4005804
Signed-off-by: Rizwan Qureshi 
---
M src/mainboard/google/hatch/variants/puff/Makefile.inc
M src/mainboard/google/hatch/variants/puff/gpio.c
A src/mainboard/google/hatch/variants/puff/ramstage.c
3 files changed, 38 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/37948/1

diff --git a/src/mainboard/google/hatch/variants/puff/Makefile.inc b/src/mainboard/google/hatch/variants/puff/Makefile.inc
index 2d1440e..65476bc 100644
--- a/src/mainboard/google/hatch/variants/puff/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/puff/Makefile.inc
@@ -15,3 +15,4 @@
 ramstage-y += gpio.c
 ramstage-y += mainboard.c
 bootblock-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/hatch/variants/puff/gpio.c b/src/mainboard/google/hatch/variants/puff/gpio.c
index 57327fe..e726f9d 100644
--- a/src/mainboard/google/hatch/variants/puff/gpio.c
+++ b/src/mainboard/google/hatch/variants/puff/gpio.c
@@ -107,6 +107,8 @@
    PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
    /* C14 : BT_DISABLE_L */
    PAD_CFG_GPO(GPP_C14, 0, DEEP),
+	PAD_CFG_GPO(GPP_C11, 0, PLTRST),
+	PAD_CFG_GPO(GPP_C10, 0, PLTRST),
    /* PCH_WP_OD */
    PAD_CFG_GPI(GPP_C20, NONE, DEEP),
    /* C21 : H1_PCH_INT_ODL */
diff --git a/src/mainboard/google/hatch/variants/puff/ramstage.c b/src/mainboard/google/hatch/variants/puff/ramstage.c
new file mode 100644
index 0000000..0371865
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/puff/ramstage.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2019 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <delay.h>
+#include <gpio.h>
+#include <baseboard/variants.h>
+#include <soc/gpio.h>
+
+void variant_ramstage_init(void)
+{
+	/*
+	 * Enable power to FPMCU, wait for power rail to stabilize,
+	 * and then deassert FPMCU reset.
+	 * Waiting for the power rail to stabilize can take a while,
+	 * a minimum of 400us on Kohaku.
+	 */
+	gpio_output(GPP_C11, 0);
+	gpio_output(GPP_C10, 0);
+	mdelay(5);
+	gpio_output(GPP_C11, 1);
+	mdelay(2);
+	gpio_output(GPP_C10, 1);
+}