Attention is currently required from: Jason Glenesk, Marshall Dawson, Christian Walter, Felix Held. Hello Jason Glenesk, Marshall Dawson, Christian Walter, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61640
to look at the new patch set (#2).
Change subject: WIP: guybrush: Call TPM Disable Deep Sleep when entering S0i3 ......................................................................
WIP: guybrush: Call TPM Disable Deep Sleep when entering S0i3
This is a WIP of calling the TPM from the S0i3 SMI handler.
Notes: * We need to increase the SMM code size const since adding the TPM code into SMM pushes it over the limit. * We should add a mainboard specific hook into elog/gsmi.c that can be used to call tlcl_cr50_disable_deep_sleep. * We need to check if the I2C controller has been powered off via the AOAC registers. If it has, we should re-initialize it. * Can this SMI handler get called while there is a TPM transaction in flight? Sharing hardware between the OS and FW is always very tricky. * I disabled the AOAC for the UART so that the SMM logs get printed to the console. See b/217968734 * What happens if suspend is aborted? Does the SMI handler get called for "resume"? How do we tell the TPM to re-enable deep sleep? The case I'm thinking about is suspend is aborted then we decide to shut down the machine.
BUG=b:214479456 TEST=Enter s0i3 on guybrush and see TPM error
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ic8eb7ffbe1b5d58eba5c1f94dde8383cd04b1d69 --- M src/cpu/x86/smm/smm_module_loader.c M src/drivers/elog/gsmi.c M src/drivers/i2c/tpm/Makefile.inc M src/security/tpm/Makefile.inc M src/security/tpm/tss/vendor/cr50/Makefile.inc M src/security/tpm/tss/vendor/cr50/cr50.c M src/security/tpm/tss/vendor/cr50/cr50.h M src/soc/amd/cezanne/acpi/mmio.asl 8 files changed, 45 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/61640/2