Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36032 )
Change subject: soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/cannonlake/Kc... File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/cannonlake/Kc... PS2, Line 128: sum of FSP stack requirement (128KiB) and CB stack requirement (1KiB).
Where did the number 1KiB for coreboot stack come from? I don't remember where, but somewhere stack […]
from coreboot stack usage side we were thinking 1KB must be sufficient. Do you think stack has to be 4KB aligned ? i was thinking that stack alignment will be handled by compiler and it might need to be just 16B aligned
https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/icelake/Kconf... File src/soc/intel/icelake/Kconfig:
https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/icelake/Kconf... PS2, Line 77: In
space after '. […]
good catch