Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48526 )
Change subject: util: Modify LPDDR4 spd_tools to generate SPDs for ADL boards ......................................................................
Patch Set 3:
Patch Set 3:
Patch Set 3:
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Will add mem_list_variant if we decide the memory part for brya. So far, it include in the global_lp4x_mem_parts.json,already.
We need to generate SPD files for soc/intel/alderlake. I am thinking that we should just move the SPDs to a common place rather than in each SoC. Not for this change, but I think that will help simplify the SPD generation and management.
+1,maybe 3rdparty/blobs is the good place to put into?
I don't think it is 3rdparty since it is being generated by coreboot utils. Probably src/spd/. We should think about the hierarchy since we need flexibility in some cases. lp4x |_ jsl/ |_ tgl_adl/ ddr4/
LP4x has different SPDs for different platforms, whereas DDR4 is common even across AMD and Intel platforms.