Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33292 )
Change subject: [TEST] soc/intel/cannonlake: Disable PCH thermal sensor check during S0ix
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Patch Set 2:
(1 comment)
This seems better than just setting a higher threshold to ensure s0ix is not aborted.
https://review.coreboot.org/#/c/33292/2/src/soc/intel/cannonlake/include/soc...
File src/soc/intel/cannonlake/include/soc/pmc.h:
https://review.coreboot.org/#/c/33292/2/src/soc/intel/cannonlake/include/soc...
PS2, Line 153:
nit: the rest of the file uses a single space after the #define and not a tab
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I298079e91bfea87ba02a8a32a622f2b0bbfc31a6
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