Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51625 )
Change subject: mb/google/mancomb: Add smihandler ......................................................................
mb/google/mancomb: Add smihandler
BUG=b:182211161 TEST=builds
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I52411917d9e7e8f8d9ac5d1c9b426a58ba09f5ae Reviewed-on: https://review.coreboot.org/c/coreboot/+/51625 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mathew King mathewk@chromium.org --- M src/mainboard/google/mancomb/Kconfig A src/mainboard/google/mancomb/smihandler.c M src/mainboard/google/mancomb/variants/baseboard/Makefile.inc M src/mainboard/google/mancomb/variants/baseboard/gpio.c M src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h 5 files changed, 53 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Mathew King: Looks good to me, approved
diff --git a/src/mainboard/google/mancomb/Kconfig b/src/mainboard/google/mancomb/Kconfig index fd59874..3fb60d4 100644 --- a/src/mainboard/google/mancomb/Kconfig +++ b/src/mainboard/google/mancomb/Kconfig @@ -11,6 +11,8 @@ select BOARD_ROMSIZE_KB_16384 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_ESPI + select ELOG + select ELOG_GSMI select HAVE_ACPI_RESUME select MAINBOARD_HAS_CHROMEOS select SOC_AMD_CEZANNE diff --git a/src/mainboard/google/mancomb/smihandler.c b/src/mainboard/google/mancomb/smihandler.c new file mode 100644 index 0000000..6facb76 --- /dev/null +++ b/src/mainboard/google/mancomb/smihandler.c @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <cpu/x86/smm.h> +#include <ec/google/chromeec/ec.h> +#include <ec/google/chromeec/smm.h> +#include <elog.h> +#include <variant/ec.h> + +void mainboard_smi_gpi(u32 gpi_sts) +{ + chromeec_smi_process_events(); +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + size_t num_gpios; + const struct soc_amd_gpio *gpios; + + chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS); + + gpios = variant_sleep_gpio_table(&num_gpios); + program_gpios(gpios, num_gpios); +} + +int mainboard_smi_apmc(u8 apmc) +{ + chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); + + return 0; +} + +void elog_gsmi_cb_mainboard_log_wake_source(void) +{ + google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS); +} diff --git a/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc b/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc index e8a05db..3b86b93 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/mancomb/variants/baseboard/Makefile.inc @@ -3,3 +3,5 @@ ramstage-y += gpio.c
verstage-y += gpio.c + +smm-y += gpio.c diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c index effa3f2..5a6f2ac 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c +++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c @@ -168,6 +168,11 @@ PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), };
+/* GPIO configuration for sleep */ +static const struct soc_amd_gpio sleep_gpio_table[] = { + /* TODO: Fill sleep gpio configuration */ +}; + const struct soc_amd_gpio *__weak variant_base_gpio_table(size_t *size) { *size = ARRAY_SIZE(base_gpio_table); @@ -183,3 +188,8 @@ *size = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } +const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(sleep_gpio_table); + return sleep_gpio_table; +} diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h index 677d4d7..dccaed0 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h @@ -21,4 +21,7 @@ /* This function provides early GPIO init in bootblock or psp. */ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size);
+/* This function provides GPIO settings before entering sleep. */ +const struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size); + #endif /* __BASEBOARD_VARIANTS_H__ */