[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/acpi: Add provision for multiple PCI segments

[Subrata Banik (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Duncan Laurie, Usha P, Aaron Durbin,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40335

to look at the new patch set (#4).

Change subject: soc/intel/common/block/acpi: Add provision for multiple PCI segments
......................................................................

soc/intel/common/block/acpi: Add provision for multiple PCI segments

This patch ensures semanticity in acpi_create_mcfg_mmconfig() programming
if SoC supports more than 256 buses and SoC user selects
CONFIG_SA_PCIEX_LENGTH > 256.

Refer to Ice Lake EDS vol 2 chapter 3.18.

Change-Id: I90660c5cfd8af5bb40e36bb409e534541c786cae
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/block/acpi/acpi.c
1 file changed, 14 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/40335/4