Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40379 )
Change subject: soc/intel: Update SA common code based on CONFIG_PCI_SEGMENT_GROUPS ......................................................................
Patch Set 4:
(4 comments)
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/apollolake/sy... File src/soc/intel/apollolake/systemagent.c:
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/apollolake/sy... PS4, Line 34: PCIEXBAR_LENGTH_MIB This value is supposed to be in bytes, right?
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/common/block/... File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/common/block/... PS4, Line 44: CONFIG_MMCONF_BASE_ADDRESS Is this supposed to be the same for all segments?
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/common/block/... File src/soc/intel/common/block/systemagent/systemagent_early.c:
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/common/block/... PS4, Line 30: switch (CONFIG_PCI_SEGMENT_GROUPS) { : case 1: : pciexbar_length = PCIEXBAR_LENGTH_256MB; : break; I am a little confused here. Does the PCI segment group number determine the length? Can you please point me to some reference to understand this better?
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/skylake/acpi.... File src/soc/intel/skylake/acpi.c:
https://review.coreboot.org/c/coreboot/+/40379/4/src/soc/intel/skylake/acpi.... PS4, Line 207: CONFIG_PCI_SEGMENT_GROUPS Does skylake support multiple segments?