[coreboot-gerrit] Change in coreboot[master]: mb/google/drallion: Update memory map

[Ivy Jian (Code Review)]

Ivy Jian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35304 )

Change subject: mb/google/drallion: Update memory map
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35304/3/src/mainboard/google/dralli... 
File src/mainboard/google/drallion/chromeos.fmd:

https://review.coreboot.org/c/coreboot/+/35304/3/src/mainboard/google/dralli... 
PS3, Line 36: 0x17c8000
> Does this fall on a boundary that is supported by the SPI flash to enable write protect?

I use dump_fmap to check the WP_RO range, it shows start 0x01c00000 - end 0x02000000 that is same as before this change.