Duan huayang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41949 )
Change subject: soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootup ......................................................................
Patch Set 12:
(5 comments)
https://review.coreboot.org/c/coreboot/+/41949/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41949/10//COMMIT_MSG@10 PS10, Line 10: large memory
larger memory sizes
Done
https://review.coreboot.org/c/coreboot/+/41949/8/src/soc/mediatek/mt8183/emi... File src/soc/mediatek/mt8183/emi.c:
https://review.coreboot.org/c/coreboot/+/41949/8/src/soc/mediatek/mt8183/emi... PS8, Line 393: dramc_err("density err!\n");
Forgot to change this?
Done
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... File src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h:
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 37: #define DQS_NUMBER_LP4 DQS_NUMBER : #define DQ_DATA_WIDTH_LP4 DQ_DATA_WIDTH
Could we rename DQ_DATA_WIDTH and DQ_DATA_WIDTH directly? So that we don't have to define "aliases" […]
Done
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... File src/soc/mediatek/mt8183/include/soc/dramc_param.h:
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 67:
Please add this blank line back.
Done
https://review.coreboot.org/c/coreboot/+/41949/10/src/soc/mediatek/mt8183/in... PS10, Line 78: cbt_ca_perbit_delay
Why add this? Is this used anywhere?
Done