Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45449 )
Change subject: nb/intel/gm45: Answer question about conversion stepping A1 ......................................................................
nb/intel/gm45: Answer question about conversion stepping A1
The datasheet briefly mentions what this mysterious stepping is about.
Change-Id: I5bc1040b74fcdf3822b15e7564f8e4ccebd7d45f Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/gm45/gm45.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/45449/1
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 31c6984..4c16abf 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -16,7 +16,7 @@ } fsb_clock_t;
typedef enum { /* Steppings below B1 were pre-production, - conversion stepping A1 is... ? + conversion stepping A1 is a newer GL40 with support for 800 MT/s on FSB/DDR. We'll support B1, B2, B3, and conversion stepping A1. */ STEPPING_A0 = 0, STEPPING_A1 = 1,