Attention is currently required from: Hung-Te Lin, Martin L Roth, Jakub Czapiga, Stefan Reinauer, Julius Werner, ron minnich.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68719 )
Change subject: NOTFORMERGE/WIP/POC Use FDT as payload handoff instead lb_tables ......................................................................
Patch Set 3:
(12 comments)
File src/lib/device_tree.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/d58b5ec8_7bcb8497 PS3, Line 148: printk(BIOS_DEBUG, "/memreserve/ 0x%016llx 0x%016llx\n", reserved_entry->start, reserved_entry->size); line length of 121 exceeds 96 columns
File src/lib/fit_payload.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/6b4a4c4d_e2cc4742 PS3, Line 109: static const char *firmware_path[] = {"firmware", NULL}; static const char * array should probably be static const char * const
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/a0b315dd_8ca1131d PS3, Line 113: static const char *serial_path[] = {"uart", NULL}; static const char * array should probably be static const char * const
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ed80691e_fdf5ff1b PS3, Line 115: serial_path, &addr_cells, &size_cells, 1); line length of 107 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/2bfc383c_f662d295 PS3, Line 120: uint64_t uart_base = serial.baseaddr,uart_size = 8 * serial.regwidth; space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/a67ad02a_e4006373 PS3, Line 136: static const char *firmware_path[] = {"firmware", NULL}; static const char * array should probably be static const char * const
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ad6f592f_39d7a5a8 PS3, Line 141: static const char *framebuffer_path[] = {"framebuffer", NULL}; static const char * array should probably be static const char * const
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/79216540_2ca92d29 PS3, Line 143: framebuffer_path, &addr_cells, &size_cells, 1); line length of 112 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/55b7c756_c9b20d5e PS3, Line 240: {CBMEM_ID_WIFI_CALIBRATION, "coreboot-wifi-calibration", "coreboot-wifi-calibration"}, line length of 102 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/ec80c478_4d013d36 PS3, Line 248: const struct cbmem_entry *cbmem_entry = cbmem_entry_find(sections_ids[i].cbmem_id); line length of 99 exceeds 96 columns
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/bc84d80b_7b8daf2b PS3, Line 254: const char *node_path[] = { sections_ids[i].dt_node, NULL}; char * array declaration might be better as static const
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162366): https://review.coreboot.org/c/coreboot/+/68719/comment/196525b7_cc5b6eeb PS3, Line 259: dt_add_reg_prop(dt_node, §ion_base, §ion_size, 1, addr_cells, size_cells); line length of 98 exceeds 96 columns