Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41368 )
Change subject: nb/intel/i440bx: add resources during read_resources()
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41368/2/src/northbridge/intel/i440b...
File src/northbridge/intel/i440bx/northbridge.c:
https://review.coreboot.org/c/coreboot/+/41368/2/src/northbridge/intel/i440b...
PS2, Line 37: pci_tolm = find_pci_tolm(dev->link_list);
This is incorrect. […]
Looks like this chipset has a max of 512MiB of ram (or 1GiB with registered dimms). And of reading the DRB register description I don't see why DRB7 wouldn't be the SDRAM size in the system.
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