[coreboot-gerrit] Change in coreboot[master]: mb/google/kohaku: Update TCC offset setting

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37587 )

Change subject: mb/google/kohaku: Update TCC offset setting
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mb/google/kohaku: Update TCC offset setting

This change sets TCC offset to 10 for kohaku.

BUG=b:144532818
BRANCH=firmware-hatch-12672.B
TEST=Checked thermal and performance efficiency internally (b:144532818)

Change-Id: Ia4b53de3a53bc39c1cd0f7626ae23d4c11a7a3db
Signed-off-by: Seunghwan Kim 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37587
Reviewed-by: Kane Chen 
Reviewed-by: Grace Kao 
Reviewed-by: Tim Wawrzynczak 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/hatch/variants/kohaku/overridetree.cb
1 file changed, 0 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kane Chen: Looks good to me, but someone else must approve
  Grace Kao: Looks good to me, but someone else must approve
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index d515ecc..cd5ce0e 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -2,8 +2,6 @@
    register "tdp_pl1_override" = "8"
    register "tdp_pl2_override" = "51"

-	register "tcc_offset" = "35"	# TCC of 65C
-
    register "SerialIoDevMode" = "{
    	[PchSerialIoIndexI2C0] = PchSerialIoPci,
    	[PchSerialIoIndexI2C1] = PchSerialIoPci,