[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0

[Duncan Laurie (Code Review)]

Attention is currently required from: John Zhao.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50086 )

Change subject: soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0
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Patch Set 2: Code-Review+2

This change is ready for review.