Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )
Change subject: binaryPI: implement C bootblock
......................................................................
Patch Set 20:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36914/20/src/cpu/x86/lapic/Makefile...
File src/cpu/x86/lapic/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/36914/20/src/cpu/x86/lapic/Makefile...
PS20, Line 4: bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
Wasn't TSC recalibrated around memory init somewhere? I thought it is not good to use TSC for these […]
The value rdstc() returns is scaled by 4. We may not have other options, TSC is typically higher resolution than LAPIC. I have topic branch on monotonic-timer we will evaluate the options there.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/36914
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d
Gerrit-Change-Number: 36914
Gerrit-PatchSet: 20
Gerrit-Owner: Michał Żygowski
michal.zygowski@3mdeb.com
Gerrit-Reviewer: Kyösti Mälkki
kyosti.malkki@gmail.com
Gerrit-Reviewer: Martin Roth
martinroth@google.com
Gerrit-Reviewer: Michał Żygowski
michal.zygowski@3mdeb.com
Gerrit-Reviewer: Patrick Georgi
pgeorgi@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Arthur Heymans
arthur@aheymans.xyz
Gerrit-CC: HAOUAS Elyes
ehaouas@noos.fr
Gerrit-CC: Mike Banon
mikebdp2@gmail.com
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Fri, 29 Nov 2019 13:24:23 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Kyösti Mälkki
kyosti.malkki@gmail.com
Comment-In-Reply-To: Michał Żygowski
michal.zygowski@3mdeb.com
Gerrit-MessageType: comment
