[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update fsp params for Jasper Lake

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38461 )

Change subject: soc/intel/tigerlake: Update fsp params for Jasper Lake
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Patch Set 20:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38461/20/src/soc/intel/tigerlake/fs... 
File src/soc/intel/tigerlake/fsp_params_jsl.c:

https://review.coreboot.org/c/coreboot/+/38461/20/src/soc/intel/tigerlake/fs... 
PS20, Line 51: 	memcpy(params->SerialIoI2cMode, config->SerialIoI2cMode,
> Based on a comment in one of the follow-up CLs, can you ensure in all the memcpy that the copy size  […]

Checked on this, I could see all the memcpy size are tied with Kconfigs(LPSS and Pcie configs) and Macro(Audio). And it matches with the fsp upd array size. Do we want to put an explicit check for all memcpy? Please let me know on your thoughts.