[coreboot-gerrit] Change in coreboot[master]: soc/intel/icelake: Allow coreboot to reserve stack for fsp

[Aamir Bohra (Code Review)]

Hello Subrata Banik,

I'd like you to do a code review. Please visit

https://review.coreboot.org/29317

to review the following change.

Change subject: soc/intel/icelake: Allow coreboot to reserve stack for fsp
......................................................................

soc/intel/icelake: Allow coreboot to reserve stack for fsp

Change-Id: I5f2d9548b8e2c7b1d154b7bad126ec7b1052231a
Signed-off-by: Subrata Banik 
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/icelake/Kconfig
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29317/1

diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 664add2..c4ee841 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -19,6 +19,7 @@
    select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
    select COMMON_FADT
    select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+	select FSP_USES_CB_STACK
    select GENERIC_GPIO_LIB
    select HAVE_FSP_GOP
    select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -89,6 +90,7 @@

config DCACHE_BSP_STACK_SIZE
    hex
+	default 0x20000 if FSP_USES_CB_STACK
    default 0x4000
    help
      The amount of anticipated stack usage in CAR by bootblock and