Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39229
to look at the new patch set (#3).
Change subject: mb/intel/tglrvp: pin mux for Display ports ......................................................................
mb/intel/tglrvp: pin mux for Display ports
Add additional pin muxes for eDP for DP portA and enable DP port1. These pin muxes were done in FSPs, these pin muxes are for bypassing pin muxes in FSPs
BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board and check FSP log or DP port pin mux from pinctl driver.
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: Id44cfba696b1a21296278f4de2ad6de8f6bbd63b --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 1 file changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/39229/3