[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cnl, dnv, icl, skl}: Make top_of_ram align

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35029 )

Change subject: soc/intel/{cnl, dnv, icl, skl}: Make top_of_ram align
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35029/1/src/soc/intel/cannonlake/ro... 
File src/soc/intel/cannonlake/romstage/romstage.c:

https://review.coreboot.org/c/coreboot/+/35029/1/src/soc/intel/cannonlake/ro... 
PS1, Line 162: 	top_of_ram = ALIGN_DOWN((uintptr_t)cbmem_top(), top_of_ram_size);
> It does what the comment says, at least 8 MiB below, at most 8 MiB above cbmem_top() will be WB. The alignment is to 8 MiB but size is 16 MiB. And this approach is only allowed because postcar_frame_add_mtrr() will split this to multiple MTRRs when necessary.

So we can add the similar comments (as you have done there) to make our assumptions clear ?