[coreboot-gerrit] Change in coreboot[master]: [WIP]cpu/x86/64bit: Add code to call FSP in protected mode

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48175 )

Change subject: [WIP]cpu/x86/64bit: Add code to call FSP in protected mode
......................................................................

[WIP]cpu/x86/64bit: Add code to call FSP in protected mode

Change-Id: I22af2d224b546c0be9e7295330b4b6602df106d6
Signed-off-by: Patrick Rudolph 
---
A src/cpu/x86/64bit/helper.S
M src/cpu/x86/Makefile.inc
M src/drivers/intel/fsp2_0/memory_init.c
3 files changed, 80 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/48175/1

diff --git a/src/cpu/x86/64bit/helper.S b/src/cpu/x86/64bit/helper.S
new file mode 100644
index 0000000..dd8f1b5
--- /dev/null
+++ b/src/cpu/x86/64bit/helper.S
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifdef ENV_X86_64
+.text
+.code64
+	.section ".text.protected_mode_call", "ax", @progbits
+	.globl protected_mode_call_2arg
+protected_mode_call_2arg:
+
+	push	%rbp
+	mov	%rsp, %rbp
+	/* Preserve registers */
+	push	%rbx
+	push	%r12
+	push	%r13
+	push	%r14
+	push	%r15
+
+	/* Arguments to stack */
+	push	%rdi
+	push	%rsi
+	push	%rdx
+	push	%rcx
+
+	#include <cpu/x86/64bit/exit32.inc>
+
+	movl	-48(%ebp), %eax	/* Argument count */
+	movl	-64(%ebp), %edx	/* Argument 0 */
+	movl	-72(%ebp), %ecx	/* Argument 1 */
+
+	/* Align the stack */
+	andl	$0xFFFFFFF0, %esp
+	test	%eax, %eax
+	je	1f	/* Zero arguments */
+
+	subl	$1, %eax
+	test	%eax, %eax
+	je	2f	/* One argument */
+
+	/* Two arguments */
+	subl	$8, %esp
+	pushl	%ecx	/* Argument 1 */
+	pushl	%edx	/* Argument 0 */
+	jmp	1f
+2:
+	subl	$12, %esp
+	pushl	%edx	/* Argument 0 */
+
+1:
+	movl	-56(%ebp), %ebx	/* Function to call */
+	call	*%ebx
+	movl	%eax, %ebx
+
+	/* Preserves ebx */
+	#include <cpu/x86/64bit/entry64.inc>
+
+	/* Place return value in rax */
+	movl	%ebx, %eax
+
+	/* Restore registers */
+	mov	-40(%rbp), %r15
+	mov	-32(%rbp), %r14
+	mov	-24(%rbp), %r13
+	mov	-16(%rbp), %r12
+	mov	-8(%rbp), %rbx
+
+	/* Restore stack pointer */
+	mov	%rbp, %rsp
+	pop	%rbp
+
+	ret
+#endif
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index 2f789f7..6d0c4ac 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -1,4 +1,6 @@
 subdirs-y += pae
+all-y += 64bit/helper.S
+
 subdirs-$(CONFIG_PARALLEL_MP) += name
 ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c
 ramstage-y += backup_default_smm.c
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index d62888e..0f6c701 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -223,6 +223,8 @@
    struct memranges memmap;
 };

+int protected_mode_call_2arg(size_t arg_count, uint64_t func, uint64_t arg1, uint64_t arg2);
+
 static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
 {
    uint32_t status;
@@ -296,7 +298,11 @@

post_code(POST_FSP_MEMORY_INIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_START);
+#if ENV_X86_64
+	status = protected_mode_call_2arg(2, (uintptr_t)fsp_raminit, (uintptr_t)&fspm_upd, (uintptr_t)fsp_get_hob_list_ptr());
+#else
    status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
+#endif
    post_code(POST_FSP_MEMORY_EXIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_END);