Aaron Durbin (adurbin@chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14429
-gerrit
commit 1e40a75a4b7b5f59ca025fbb4b8622dc3fd21c5d Author: Aaron Durbin adurbin@chromium.org Date: Tue Apr 19 15:17:08 2016 -0500
arch: use Kconfig variable for coreboot table size
Instead of hard coding a #define in each architecture's tables.c for the coreboot table size in cbmem use a Kconfig varible. This aids in aligning on a common write_tables() implementation instead of duplicating the code for each architecture.
Change-Id: I09c0f56133606ea62e9a9c4c6b9828bc24dcc668 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/Kconfig | 9 +++++++++ src/arch/arm/tables.c | 2 +- src/arch/arm64/tables.c | 2 +- src/arch/mips/tables.c | 2 +- src/arch/power8/tables.c | 2 +- src/arch/riscv/tables.c | 2 +- src/arch/x86/tables.c | 3 ++- 7 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig index 0649bf7..f61e3df 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -656,6 +656,15 @@ config ACPI_NHLT help Build support for NHLT (non HD Audio) ACPI table generation.
+ +config COREBOOT_TABLE_SIZE + hex + default 0x8000 if ARCH_X86 + default 0x2000 if !ARCH_X86 + help + The amount of memory to reserve for the coreboot tables in + cbmem. + #These Options are here to avoid "undefined" warnings. #The actual selection and help texts are in the following menu.
diff --git a/src/arch/arm/tables.c b/src/arch/arm/tables.c index f2d0c86..17a3fd1 100644 --- a/src/arch/arm/tables.c +++ b/src/arch/arm/tables.c @@ -23,7 +23,7 @@ #include <cbmem.h> #include <lib.h>
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE
void write_tables(void) { diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c index f2d0c86..17a3fd1 100644 --- a/src/arch/arm64/tables.c +++ b/src/arch/arm64/tables.c @@ -23,7 +23,7 @@ #include <cbmem.h> #include <lib.h>
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE
void write_tables(void) { diff --git a/src/arch/mips/tables.c b/src/arch/mips/tables.c index 717b7fd..2083442 100644 --- a/src/arch/mips/tables.c +++ b/src/arch/mips/tables.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <lib.h>
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE
void write_tables(void) { diff --git a/src/arch/power8/tables.c b/src/arch/power8/tables.c index b5bc9ab..0a88505 100644 --- a/src/arch/power8/tables.c +++ b/src/arch/power8/tables.c @@ -23,7 +23,7 @@ #include <cbmem.h> #include <lib.h>
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE
void write_tables(void) { diff --git a/src/arch/riscv/tables.c b/src/arch/riscv/tables.c index f2d0c86..17a3fd1 100644 --- a/src/arch/riscv/tables.c +++ b/src/arch/riscv/tables.c @@ -23,7 +23,7 @@ #include <cbmem.h> #include <lib.h>
-#define MAX_COREBOOT_TABLE_SIZE (8 * 1024) +#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE
void write_tables(void) { diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index 86e2b23..8cfd655 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -26,6 +26,8 @@ #include <cbmem.h> #include <smbios.h>
+#define MAX_COREBOOT_TABLE_SIZE CONFIG_COREBOOT_TABLE_SIZE + void write_tables(void) { unsigned long low_table_start, low_table_end; @@ -181,7 +183,6 @@ void write_tables(void)
post_code(0x9e);
-#define MAX_COREBOOT_TABLE_SIZE (32 * 1024) post_code(0x9d);
high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_CBTABLE, MAX_COREBOOT_TABLE_SIZE);