Marcello Sylvester Bauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37137 )
Change subject: sb/intel/common: Add AHCI code ......................................................................
Patch Set 5:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37137/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37137/3//COMMIT_MSG@15 PS3, Line 15: version
Put this on the next line? It's over 72 chars
Done
https://review.coreboot.org/c/coreboot/+/37137/2/src/southbridge/intel/commo... File src/southbridge/intel/common/ahci.h:
https://review.coreboot.org/c/coreboot/+/37137/2/src/southbridge/intel/commo... PS2, Line 27: const u32 clear_vnd);
Qualifications of the parameter type like the `const` here are meaningless in […]
Ack
https://review.coreboot.org/c/coreboot/+/37137/2/src/southbridge/intel/commo... File src/southbridge/intel/common/ahci.c:
https://review.coreboot.org/c/coreboot/+/37137/2/src/southbridge/intel/commo... PS2, Line 73: ports
What I meant here is that the register value is 0-based, hence we need […]
Ack
https://review.coreboot.org/c/coreboot/+/37137/3/src/southbridge/intel/commo... File src/southbridge/intel/common/ahci.c:
PS3:
SPDX please
Done
https://review.coreboot.org/c/coreboot/+/37137/3/src/southbridge/intel/commo... PS3, Line 17: #include <arch/io.h>
unused.
Done