30 Apr
2020
30 Apr
'20
1:36 a.m.
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40872 )
Change subject: soc/intel/tigerlake: Update interrupt setting ......................................................................
Patch Set 4: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibf70974b8c4f63184d576be3edd290960b023b1e
Gerrit-Change-Number: 40872
Gerrit-PatchSet: 4
Gerrit-Owner: Wonkyu Kim wonkyu.kim@intel.com
Gerrit-Reviewer: Caveh Jalali caveh@chromium.org
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
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Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
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Gerrit-Reviewer: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com
Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com
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Gerrit-Comment-Date: Wed, 29 Apr 2020 22:36:23 +0000
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