[coreboot-gerrit] Change in coreboot[master]: soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB

[V Sowmya (Code Review)]

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36032 )

Change subject: soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB
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Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/cannonlake/Kc... 
File src/soc/intel/cannonlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/cannonlake/Kc... 
PS2, Line 128: 	  sum of FSP stack requirement (128KiB) and CB stack requirement (1KiB).
> from coreboot stack usage side we were thinking 1KB must be sufficient. […]

We checked the current coreboot stack usage which is ~400bytes and adding 1KiB to FSP stack requirement must be sufficient. 
Even i couldn't get any reference to the stack alignment of 4KiB.

https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/icelake/Kconf... 
File src/soc/intel/icelake/Kconfig:

https://review.coreboot.org/c/coreboot/+/36032/2/src/soc/intel/icelake/Kconf... 
PS2, Line 77: In
> good catch

Done